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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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151 V(MipsI32x4Ne) \ | 151 V(MipsI32x4Ne) \ |
152 V(MipsI32x4Shl) \ | 152 V(MipsI32x4Shl) \ |
153 V(MipsI32x4ShrS) \ | 153 V(MipsI32x4ShrS) \ |
154 V(MipsI32x4ShrU) \ | 154 V(MipsI32x4ShrU) \ |
155 V(MipsI32x4MaxU) \ | 155 V(MipsI32x4MaxU) \ |
156 V(MipsI32x4MinU) \ | 156 V(MipsI32x4MinU) \ |
157 V(MipsS32x4Select) \ | 157 V(MipsS32x4Select) \ |
158 V(MipsF32x4Abs) \ | 158 V(MipsF32x4Abs) \ |
159 V(MipsF32x4Neg) \ | 159 V(MipsF32x4Neg) \ |
160 V(MipsF32x4RecipApprox) \ | 160 V(MipsF32x4RecipApprox) \ |
161 V(MipsF32x4RecipRefine) \ | |
162 V(MipsF32x4RecipSqrtApprox) \ | 161 V(MipsF32x4RecipSqrtApprox) \ |
163 V(MipsF32x4RecipSqrtRefine) \ | |
164 V(MipsF32x4Add) \ | 162 V(MipsF32x4Add) \ |
165 V(MipsF32x4Sub) \ | 163 V(MipsF32x4Sub) \ |
166 V(MipsF32x4Mul) \ | 164 V(MipsF32x4Mul) \ |
167 V(MipsF32x4Max) \ | 165 V(MipsF32x4Max) \ |
168 V(MipsF32x4Min) \ | 166 V(MipsF32x4Min) \ |
169 V(MipsF32x4Eq) \ | 167 V(MipsF32x4Eq) \ |
170 V(MipsF32x4Ne) \ | 168 V(MipsF32x4Ne) \ |
171 V(MipsF32x4Lt) \ | 169 V(MipsF32x4Lt) \ |
172 V(MipsF32x4Le) \ | 170 V(MipsF32x4Le) \ |
173 V(MipsI32x4SConvertF32x4) \ | 171 V(MipsI32x4SConvertF32x4) \ |
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190 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 188 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
191 V(MRI) /* [%r0 + K] */ \ | 189 V(MRI) /* [%r0 + K] */ \ |
192 V(MRR) /* [%r0 + %r1] */ | 190 V(MRR) /* [%r0 + %r1] */ |
193 | 191 |
194 | 192 |
195 } // namespace compiler | 193 } // namespace compiler |
196 } // namespace internal | 194 } // namespace internal |
197 } // namespace v8 | 195 } // namespace v8 |
198 | 196 |
199 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 197 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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