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Issue 2819093002: Revert "Reland "ARM64: Add NEON support"" (Closed)
Patch Set: Created 3 years, 8 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after
52 52
53 bool Equal64(uint64_t expected, const RegisterDump*, uint64_t result) { 53 bool Equal64(uint64_t expected, const RegisterDump*, uint64_t result) {
54 if (result != expected) { 54 if (result != expected) {
55 printf("Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n", 55 printf("Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n",
56 expected, result); 56 expected, result);
57 } 57 }
58 58
59 return expected == result; 59 return expected == result;
60 } 60 }
61 61
62 bool Equal128(vec128_t expected, const RegisterDump*, vec128_t result) {
63 if ((result.h != expected.h) || (result.l != expected.l)) {
64 printf("Expected 0x%016" PRIx64 "%016" PRIx64
65 "\t "
66 "Found 0x%016" PRIx64 "%016" PRIx64 "\n",
67 expected.h, expected.l, result.h, result.l);
68 }
69
70 return ((expected.h == result.h) && (expected.l == result.l));
71 }
72 62
73 bool EqualFP32(float expected, const RegisterDump*, float result) { 63 bool EqualFP32(float expected, const RegisterDump*, float result) {
74 if (bit_cast<uint32_t>(expected) == bit_cast<uint32_t>(result)) { 64 if (float_to_rawbits(expected) == float_to_rawbits(result)) {
75 return true; 65 return true;
76 } else { 66 } else {
77 if (std::isnan(expected) || (expected == 0.0)) { 67 if (std::isnan(expected) || (expected == 0.0)) {
78 printf("Expected 0x%08" PRIx32 "\t Found 0x%08" PRIx32 "\n", 68 printf("Expected 0x%08" PRIx32 "\t Found 0x%08" PRIx32 "\n",
79 bit_cast<uint32_t>(expected), bit_cast<uint32_t>(result)); 69 float_to_rawbits(expected), float_to_rawbits(result));
80 } else { 70 } else {
81 printf("Expected %.9f (0x%08" PRIx32 71 printf("Expected %.9f (0x%08" PRIx32 ")\t "
82 ")\t "
83 "Found %.9f (0x%08" PRIx32 ")\n", 72 "Found %.9f (0x%08" PRIx32 ")\n",
84 expected, bit_cast<uint32_t>(expected), result, 73 expected, float_to_rawbits(expected),
85 bit_cast<uint32_t>(result)); 74 result, float_to_rawbits(result));
86 } 75 }
87 return false; 76 return false;
88 } 77 }
89 } 78 }
90 79
91 80
92 bool EqualFP64(double expected, const RegisterDump*, double result) { 81 bool EqualFP64(double expected, const RegisterDump*, double result) {
93 if (bit_cast<uint64_t>(expected) == bit_cast<uint64_t>(result)) { 82 if (double_to_rawbits(expected) == double_to_rawbits(result)) {
94 return true; 83 return true;
95 } 84 }
96 85
97 if (std::isnan(expected) || (expected == 0.0)) { 86 if (std::isnan(expected) || (expected == 0.0)) {
98 printf("Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n", 87 printf("Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n",
99 bit_cast<uint64_t>(expected), bit_cast<uint64_t>(result)); 88 double_to_rawbits(expected), double_to_rawbits(result));
100 } else { 89 } else {
101 printf("Expected %.17f (0x%016" PRIx64 90 printf("Expected %.17f (0x%016" PRIx64 ")\t "
102 ")\t "
103 "Found %.17f (0x%016" PRIx64 ")\n", 91 "Found %.17f (0x%016" PRIx64 ")\n",
104 expected, bit_cast<uint64_t>(expected), result, 92 expected, double_to_rawbits(expected),
105 bit_cast<uint64_t>(result)); 93 result, double_to_rawbits(result));
106 } 94 }
107 return false; 95 return false;
108 } 96 }
109 97
110 98
111 bool Equal32(uint32_t expected, const RegisterDump* core, const Register& reg) { 99 bool Equal32(uint32_t expected, const RegisterDump* core, const Register& reg) {
112 CHECK(reg.Is32Bits()); 100 CHECK(reg.Is32Bits());
113 // Retrieve the corresponding X register so we can check that the upper part 101 // Retrieve the corresponding X register so we can check that the upper part
114 // was properly cleared. 102 // was properly cleared.
115 int64_t result_x = core->xreg(reg.code()); 103 int64_t result_x = core->xreg(reg.code());
116 if ((result_x & 0xffffffff00000000L) != 0) { 104 if ((result_x & 0xffffffff00000000L) != 0) {
117 printf("Expected 0x%08" PRIx32 "\t Found 0x%016" PRIx64 "\n", 105 printf("Expected 0x%08" PRIx32 "\t Found 0x%016" PRIx64 "\n",
118 expected, result_x); 106 expected, result_x);
119 return false; 107 return false;
120 } 108 }
121 uint32_t result_w = core->wreg(reg.code()); 109 uint32_t result_w = core->wreg(reg.code());
122 return Equal32(expected, core, result_w); 110 return Equal32(expected, core, result_w);
123 } 111 }
124 112
125 113
126 bool Equal64(uint64_t expected, 114 bool Equal64(uint64_t expected,
127 const RegisterDump* core, 115 const RegisterDump* core,
128 const Register& reg) { 116 const Register& reg) {
129 CHECK(reg.Is64Bits()); 117 CHECK(reg.Is64Bits());
130 uint64_t result = core->xreg(reg.code()); 118 uint64_t result = core->xreg(reg.code());
131 return Equal64(expected, core, result); 119 return Equal64(expected, core, result);
132 } 120 }
133 121
134 bool Equal128(uint64_t expected_h, uint64_t expected_l,
135 const RegisterDump* core, const VRegister& vreg) {
136 CHECK(vreg.Is128Bits());
137 vec128_t expected = {expected_l, expected_h};
138 vec128_t result = core->qreg(vreg.code());
139 return Equal128(expected, core, result);
140 }
141 122
142 bool EqualFP32(float expected, const RegisterDump* core, 123 bool EqualFP32(float expected,
143 const VRegister& fpreg) { 124 const RegisterDump* core,
125 const FPRegister& fpreg) {
144 CHECK(fpreg.Is32Bits()); 126 CHECK(fpreg.Is32Bits());
145 // Retrieve the corresponding D register so we can check that the upper part 127 // Retrieve the corresponding D register so we can check that the upper part
146 // was properly cleared. 128 // was properly cleared.
147 uint64_t result_64 = core->dreg_bits(fpreg.code()); 129 uint64_t result_64 = core->dreg_bits(fpreg.code());
148 if ((result_64 & 0xffffffff00000000L) != 0) { 130 if ((result_64 & 0xffffffff00000000L) != 0) {
149 printf("Expected 0x%08" PRIx32 " (%f)\t Found 0x%016" PRIx64 "\n", 131 printf("Expected 0x%08" PRIx32 " (%f)\t Found 0x%016" PRIx64 "\n",
150 bit_cast<uint32_t>(expected), expected, result_64); 132 float_to_rawbits(expected), expected, result_64);
151 return false; 133 return false;
152 } 134 }
153 135
154 return EqualFP32(expected, core, core->sreg(fpreg.code())); 136 return EqualFP32(expected, core, core->sreg(fpreg.code()));
155 } 137 }
156 138
157 bool EqualFP64(double expected, const RegisterDump* core, 139
158 const VRegister& fpreg) { 140 bool EqualFP64(double expected,
141 const RegisterDump* core,
142 const FPRegister& fpreg) {
159 CHECK(fpreg.Is64Bits()); 143 CHECK(fpreg.Is64Bits());
160 return EqualFP64(expected, core, core->dreg(fpreg.code())); 144 return EqualFP64(expected, core, core->dreg(fpreg.code()));
161 } 145 }
162 146
163 147
164 bool Equal64(const Register& reg0, 148 bool Equal64(const Register& reg0,
165 const RegisterDump* core, 149 const RegisterDump* core,
166 const Register& reg1) { 150 const Register& reg1) {
167 CHECK(reg0.Is64Bits() && reg1.Is64Bits()); 151 CHECK(reg0.Is64Bits() && reg1.Is64Bits());
168 int64_t expected = core->xreg(reg0.code()); 152 int64_t expected = core->xreg(reg0.code());
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after
207 191
208 bool EqualRegisters(const RegisterDump* a, const RegisterDump* b) { 192 bool EqualRegisters(const RegisterDump* a, const RegisterDump* b) {
209 for (unsigned i = 0; i < kNumberOfRegisters; i++) { 193 for (unsigned i = 0; i < kNumberOfRegisters; i++) {
210 if (a->xreg(i) != b->xreg(i)) { 194 if (a->xreg(i) != b->xreg(i)) {
211 printf("x%d\t Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n", 195 printf("x%d\t Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n",
212 i, a->xreg(i), b->xreg(i)); 196 i, a->xreg(i), b->xreg(i));
213 return false; 197 return false;
214 } 198 }
215 } 199 }
216 200
217 for (unsigned i = 0; i < kNumberOfVRegisters; i++) { 201 for (unsigned i = 0; i < kNumberOfFPRegisters; i++) {
218 uint64_t a_bits = a->dreg_bits(i); 202 uint64_t a_bits = a->dreg_bits(i);
219 uint64_t b_bits = b->dreg_bits(i); 203 uint64_t b_bits = b->dreg_bits(i);
220 if (a_bits != b_bits) { 204 if (a_bits != b_bits) {
221 printf("d%d\t Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n", 205 printf("d%d\t Expected 0x%016" PRIx64 "\t Found 0x%016" PRIx64 "\n",
222 i, a_bits, b_bits); 206 i, a_bits, b_bits);
223 return false; 207 return false;
224 } 208 }
225 } 209 }
226 210
227 return true; 211 return true;
(...skipping 19 matching lines...) Expand all
247 list |= (1UL << n); 231 list |= (1UL << n);
248 i++; 232 i++;
249 } 233 }
250 } 234 }
251 // Check that we got enough registers. 235 // Check that we got enough registers.
252 CHECK(CountSetBits(list, kNumberOfRegisters) == reg_count); 236 CHECK(CountSetBits(list, kNumberOfRegisters) == reg_count);
253 237
254 return list; 238 return list;
255 } 239 }
256 240
257 RegList PopulateVRegisterArray(VRegister* s, VRegister* d, VRegister* v, 241
258 int reg_size, int reg_count, RegList allowed) { 242 RegList PopulateFPRegisterArray(FPRegister* s, FPRegister* d, FPRegister* v,
243 int reg_size, int reg_count, RegList allowed) {
259 RegList list = 0; 244 RegList list = 0;
260 int i = 0; 245 int i = 0;
261 for (unsigned n = 0; (n < kNumberOfVRegisters) && (i < reg_count); n++) { 246 for (unsigned n = 0; (n < kNumberOfFPRegisters) && (i < reg_count); n++) {
262 if (((1UL << n) & allowed) != 0) { 247 if (((1UL << n) & allowed) != 0) {
263 // Only assigned allowed registers. 248 // Only assigned allowed registers.
264 if (v) { 249 if (v) {
265 v[i] = VRegister::Create(n, reg_size); 250 v[i] = FPRegister::Create(n, reg_size);
266 } 251 }
267 if (d) { 252 if (d) {
268 d[i] = VRegister::Create(n, kDRegSizeInBits); 253 d[i] = FPRegister::Create(n, kDRegSizeInBits);
269 } 254 }
270 if (s) { 255 if (s) {
271 s[i] = VRegister::Create(n, kSRegSizeInBits); 256 s[i] = FPRegister::Create(n, kSRegSizeInBits);
272 } 257 }
273 list |= (1UL << n); 258 list |= (1UL << n);
274 i++; 259 i++;
275 } 260 }
276 } 261 }
277 // Check that we got enough registers. 262 // Check that we got enough registers.
278 CHECK(CountSetBits(list, kNumberOfVRegisters) == reg_count); 263 CHECK(CountSetBits(list, kNumberOfFPRegisters) == reg_count);
279 264
280 return list; 265 return list;
281 } 266 }
282 267
283 268
284 void Clobber(MacroAssembler* masm, RegList reg_list, uint64_t const value) { 269 void Clobber(MacroAssembler* masm, RegList reg_list, uint64_t const value) {
285 Register first = NoReg; 270 Register first = NoReg;
286 for (unsigned i = 0; i < kNumberOfRegisters; i++) { 271 for (unsigned i = 0; i < kNumberOfRegisters; i++) {
287 if (reg_list & (1UL << i)) { 272 if (reg_list & (1UL << i)) {
288 Register xn = Register::Create(i, kXRegSizeInBits); 273 Register xn = Register::Create(i, kXRegSizeInBits);
289 // We should never write into csp here. 274 // We should never write into csp here.
290 CHECK(!xn.Is(csp)); 275 CHECK(!xn.Is(csp));
291 if (!xn.IsZero()) { 276 if (!xn.IsZero()) {
292 if (!first.IsValid()) { 277 if (!first.IsValid()) {
293 // This is the first register we've hit, so construct the literal. 278 // This is the first register we've hit, so construct the literal.
294 __ Mov(xn, value); 279 __ Mov(xn, value);
295 first = xn; 280 first = xn;
296 } else { 281 } else {
297 // We've already loaded the literal, so re-use the value already 282 // We've already loaded the literal, so re-use the value already
298 // loaded into the first register we hit. 283 // loaded into the first register we hit.
299 __ Mov(xn, first); 284 __ Mov(xn, first);
300 } 285 }
301 } 286 }
302 } 287 }
303 } 288 }
304 } 289 }
305 290
306 291
307 void ClobberFP(MacroAssembler* masm, RegList reg_list, double const value) { 292 void ClobberFP(MacroAssembler* masm, RegList reg_list, double const value) {
308 VRegister first = NoVReg; 293 FPRegister first = NoFPReg;
309 for (unsigned i = 0; i < kNumberOfVRegisters; i++) { 294 for (unsigned i = 0; i < kNumberOfFPRegisters; i++) {
310 if (reg_list & (1UL << i)) { 295 if (reg_list & (1UL << i)) {
311 VRegister dn = VRegister::Create(i, kDRegSizeInBits); 296 FPRegister dn = FPRegister::Create(i, kDRegSizeInBits);
312 if (!first.IsValid()) { 297 if (!first.IsValid()) {
313 // This is the first register we've hit, so construct the literal. 298 // This is the first register we've hit, so construct the literal.
314 __ Fmov(dn, value); 299 __ Fmov(dn, value);
315 first = dn; 300 first = dn;
316 } else { 301 } else {
317 // We've already loaded the literal, so re-use the value already loaded 302 // We've already loaded the literal, so re-use the value already loaded
318 // into the first register we hit. 303 // into the first register we hit.
319 __ Fmov(dn, first); 304 __ Fmov(dn, first);
320 } 305 }
321 } 306 }
322 } 307 }
323 } 308 }
324 309
325 310
326 void Clobber(MacroAssembler* masm, CPURegList reg_list) { 311 void Clobber(MacroAssembler* masm, CPURegList reg_list) {
327 if (reg_list.type() == CPURegister::kRegister) { 312 if (reg_list.type() == CPURegister::kRegister) {
328 // This will always clobber X registers. 313 // This will always clobber X registers.
329 Clobber(masm, reg_list.list()); 314 Clobber(masm, reg_list.list());
330 } else if (reg_list.type() == CPURegister::kVRegister) { 315 } else if (reg_list.type() == CPURegister::kFPRegister) {
331 // This will always clobber D registers. 316 // This will always clobber D registers.
332 ClobberFP(masm, reg_list.list()); 317 ClobberFP(masm, reg_list.list());
333 } else { 318 } else {
334 UNREACHABLE(); 319 UNREACHABLE();
335 } 320 }
336 } 321 }
337 322
338 323
339 void RegisterDump::Dump(MacroAssembler* masm) { 324 void RegisterDump::Dump(MacroAssembler* masm) {
340 CHECK(__ StackPointer().Is(csp)); 325 CHECK(__ StackPointer().Is(csp));
(...skipping 10 matching lines...) Expand all
351 Register tmp = x2; 336 Register tmp = x2;
352 Register dump_base_w = dump_base.W(); 337 Register dump_base_w = dump_base.W();
353 Register dump_w = dump.W(); 338 Register dump_w = dump.W();
354 Register tmp_w = tmp.W(); 339 Register tmp_w = tmp.W();
355 340
356 // Offsets into the dump_ structure. 341 // Offsets into the dump_ structure.
357 const int x_offset = offsetof(dump_t, x_); 342 const int x_offset = offsetof(dump_t, x_);
358 const int w_offset = offsetof(dump_t, w_); 343 const int w_offset = offsetof(dump_t, w_);
359 const int d_offset = offsetof(dump_t, d_); 344 const int d_offset = offsetof(dump_t, d_);
360 const int s_offset = offsetof(dump_t, s_); 345 const int s_offset = offsetof(dump_t, s_);
361 const int q_offset = offsetof(dump_t, q_);
362 const int sp_offset = offsetof(dump_t, sp_); 346 const int sp_offset = offsetof(dump_t, sp_);
363 const int wsp_offset = offsetof(dump_t, wsp_); 347 const int wsp_offset = offsetof(dump_t, wsp_);
364 const int flags_offset = offsetof(dump_t, flags_); 348 const int flags_offset = offsetof(dump_t, flags_);
365 349
366 __ Push(xzr, dump_base, dump, tmp); 350 __ Push(xzr, dump_base, dump, tmp);
367 351
368 // Load the address where we will dump the state. 352 // Load the address where we will dump the state.
369 __ Mov(dump_base, reinterpret_cast<uint64_t>(&dump_)); 353 __ Mov(dump_base, reinterpret_cast<uint64_t>(&dump_));
370 354
371 // Dump the stack pointer (csp and wcsp). 355 // Dump the stack pointer (csp and wcsp).
(...skipping 14 matching lines...) Expand all
386 370
387 // Dump W registers. 371 // Dump W registers.
388 __ Add(dump, dump_base, w_offset); 372 __ Add(dump, dump_base, w_offset);
389 for (unsigned i = 0; i < kNumberOfRegisters; i += 2) { 373 for (unsigned i = 0; i < kNumberOfRegisters; i += 2) {
390 __ Stp(Register::WRegFromCode(i), Register::WRegFromCode(i + 1), 374 __ Stp(Register::WRegFromCode(i), Register::WRegFromCode(i + 1),
391 MemOperand(dump, i * kWRegSize)); 375 MemOperand(dump, i * kWRegSize));
392 } 376 }
393 377
394 // Dump D registers. 378 // Dump D registers.
395 __ Add(dump, dump_base, d_offset); 379 __ Add(dump, dump_base, d_offset);
396 for (unsigned i = 0; i < kNumberOfVRegisters; i += 2) { 380 for (unsigned i = 0; i < kNumberOfFPRegisters; i += 2) {
397 __ Stp(VRegister::DRegFromCode(i), VRegister::DRegFromCode(i + 1), 381 __ Stp(FPRegister::DRegFromCode(i), FPRegister::DRegFromCode(i + 1),
398 MemOperand(dump, i * kDRegSize)); 382 MemOperand(dump, i * kDRegSize));
399 } 383 }
400 384
401 // Dump S registers. 385 // Dump S registers.
402 __ Add(dump, dump_base, s_offset); 386 __ Add(dump, dump_base, s_offset);
403 for (unsigned i = 0; i < kNumberOfVRegisters; i += 2) { 387 for (unsigned i = 0; i < kNumberOfFPRegisters; i += 2) {
404 __ Stp(VRegister::SRegFromCode(i), VRegister::SRegFromCode(i + 1), 388 __ Stp(FPRegister::SRegFromCode(i), FPRegister::SRegFromCode(i + 1),
405 MemOperand(dump, i * kSRegSize)); 389 MemOperand(dump, i * kSRegSize));
406 } 390 }
407 391
408 // Dump Q registers.
409 __ Add(dump, dump_base, q_offset);
410 for (unsigned i = 0; i < kNumberOfVRegisters; i += 2) {
411 __ Stp(VRegister::QRegFromCode(i), VRegister::QRegFromCode(i + 1),
412 MemOperand(dump, i * kQRegSize));
413 }
414
415 // Dump the flags. 392 // Dump the flags.
416 __ Mrs(tmp, NZCV); 393 __ Mrs(tmp, NZCV);
417 __ Str(tmp, MemOperand(dump_base, flags_offset)); 394 __ Str(tmp, MemOperand(dump_base, flags_offset));
418 395
419 // To dump the values that were in tmp amd dump, we need a new scratch 396 // To dump the values that were in tmp amd dump, we need a new scratch
420 // register. We can use any of the already dumped registers since we can 397 // register. We can use any of the already dumped registers since we can
421 // easily restore them. 398 // easily restore them.
422 Register dump2_base = x10; 399 Register dump2_base = x10;
423 Register dump2 = x11; 400 Register dump2 = x11;
424 CHECK(!AreAliased(dump_base, dump, tmp, dump2_base, dump2)); 401 CHECK(!AreAliased(dump_base, dump, tmp, dump2_base, dump2));
(...skipping 19 matching lines...) Expand all
444 421
445 // Restore the MacroAssembler's scratch registers. 422 // Restore the MacroAssembler's scratch registers.
446 masm->TmpList()->set_list(old_tmp_list); 423 masm->TmpList()->set_list(old_tmp_list);
447 masm->FPTmpList()->set_list(old_fptmp_list); 424 masm->FPTmpList()->set_list(old_fptmp_list);
448 425
449 completed_ = true; 426 completed_ = true;
450 } 427 }
451 428
452 } // namespace internal 429 } // namespace internal
453 } // namespace v8 430 } // namespace v8
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