Revert of tcmalloc: Use C++11 atomics where appropriate.

third_party/tcmalloc/chromium/src/base/atomicops.h

 /* Copyright (c) 2006, Google Inc.
  * All rights reserved.
  * 
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
  * met:
  * 
  *     * Redistributions of source code must retain the above copyright
  * notice, this list of conditions and the following disclaimer.
  *     * Redistributions in binary form must reproduce the above
@@ skipping 13 matching lines @@
  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * ---
  * Author: Sanjay Ghemawat
  */
 
+// For atomic operations on statistics counters, see atomic_stats_counter.h.
+// For atomic operations on sequence numbers, see atomic_sequence_num.h.
+// For atomic operations on reference counts, see atomic_refcount.h.
+
 // Some fast atomic operations -- typically with machine-dependent
 // implementations.  This file may need editing as Google code is
 // ported to different architectures.
 
 // The routines exported by this module are subtle.  If you use them, even if
 // you get the code right, it will depend on careful reasoning about atomicity
 // and memory ordering; it will be less readable, and harder to maintain.  If
 // you plan to use these routines, you should have a good reason, such as solid
 // evidence that performance would otherwise suffer, or there being no
 // alternative.  You should assume only properties explicitly guaranteed by the
@@ skipping 28 matching lines @@
 // and operations listed below.  Implementations are to provide Atomic32
 // and Atomic64 operations. If there is a mismatch between intptr_t and
 // the Atomic32 or Atomic64 types for a platform, the platform-specific header
 // should define the macro, AtomicWordCastType in a clause similar to the
 // following:
 // #if ...pointers are 64 bits...
 // # define AtomicWordCastType base::subtle::Atomic64
 // #else
 // # define AtomicWordCastType Atomic32
 // #endif
+// TODO(csilvers): figure out ARCH_PIII/ARCH_K8 (perhaps via ./configure?)
 // ------------------------------------------------------------------------
 
+#include "base/arm_instruction_set_select.h"
+
+// TODO(csilvers): match piii, not just __i386.  Also, match k8
 #if defined(__MACH__) && defined(__APPLE__)
 #include "base/atomicops-internals-macosx.h"
+#elif defined(__GNUC__) && defined(ARMV6)
+#include "base/atomicops-internals-arm-v6plus.h"
+#elif defined(ARMV3)
+#include "base/atomicops-internals-arm-generic.h"
 #elif defined(_WIN32)
 #include "base/atomicops-internals-windows.h"
+#elif defined(__GNUC__) && (defined(__i386) || defined(__x86_64__))
+#include "base/atomicops-internals-x86.h"
+#elif defined(__linux__) && defined(__PPC__)
+#include "base/atomicops-internals-linuxppc.h"
 #else
-#include "base/atomicops_internals_portable.h"
+// Assume x86 for now.  If you need to support a new architecture and
+// don't know how to implement atomic ops, you can probably get away
+// with using pthreads, since atomicops is only used by spinlock.h/cc
+//#error You need to implement atomic operations for this architecture
+#include "base/atomicops-internals-x86.h"
 #endif
 
 // Signed type that can hold a pointer and supports the atomic ops below, as
 // well as atomic loads and stores.  Instances must be naturally-aligned.
 typedef intptr_t AtomicWord;
 
 #ifdef AtomicWordCastType
 // ------------------------------------------------------------------------
 // This section is needed only when explicit type casting is required to
 // cast AtomicWord to one of the basic atomic types (Atomic64 or Atomic32).
@@ skipping 262 matching lines @@
   return base::subtle::Acquire_Load(ptr);
 }
 inline base::subtle::Atomic64 Release_Load(
     volatile const base::subtle::Atomic64* ptr) {
   return base::subtle::Release_Load(ptr);
 }
 
 #endif  // BASE_HAS_ATOMIC64
 
 #endif  // THREAD_ATOMICOPS_H_