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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_X64) | 6 #if defined(TARGET_ARCH_X64) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
10 #include "vm/heap.h" | 10 #include "vm/heap.h" |
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2356 } | 2356 } |
2357 } | 2357 } |
2358 | 2358 |
2359 | 2359 |
2360 void Assembler::PopRegister(Register r) { | 2360 void Assembler::PopRegister(Register r) { |
2361 popq(r); | 2361 popq(r); |
2362 } | 2362 } |
2363 | 2363 |
2364 | 2364 |
2365 void Assembler::AddImmediate(Register reg, const Immediate& imm, Register pp) { | 2365 void Assembler::AddImmediate(Register reg, const Immediate& imm, Register pp) { |
2366 int64_t value = imm.value(); | 2366 const int64_t value = imm.value(); |
2367 if (value > 0) { | 2367 if (value == 0) { |
| 2368 return; |
| 2369 } |
| 2370 if ((value > 0) || (value == kMinInt64)) { |
2368 if (value == 1) { | 2371 if (value == 1) { |
2369 incq(reg); | 2372 incq(reg); |
2370 } else if (value != 0) { | 2373 } else { |
2371 if (CanLoadImmediateFromPool(imm, pp)) { | 2374 if (CanLoadImmediateFromPool(imm, pp)) { |
2372 ASSERT(reg != TMP); | 2375 ASSERT(reg != TMP); |
2373 LoadImmediate(TMP, imm, pp); | 2376 LoadImmediate(TMP, imm, pp); |
2374 addq(reg, TMP); | 2377 addq(reg, TMP); |
2375 } else { | 2378 } else { |
2376 addq(reg, imm); | 2379 addq(reg, imm); |
2377 } | 2380 } |
2378 } | 2381 } |
2379 } else if (value < 0) { | 2382 } else { |
2380 value = -value; | 2383 SubImmediate(reg, Immediate(-value), pp); |
2381 if (value == 1) { | |
2382 decq(reg); | |
2383 } else if (value != 0) { | |
2384 const Immediate& s = Immediate(value); | |
2385 if (CanLoadImmediateFromPool(s, pp)) { | |
2386 ASSERT(reg != TMP); | |
2387 LoadImmediate(TMP, s, pp); | |
2388 subq(reg, TMP); | |
2389 } else { | |
2390 subq(reg, Immediate(value)); | |
2391 } | |
2392 } | |
2393 } | 2384 } |
2394 } | 2385 } |
2395 | 2386 |
2396 | 2387 |
2397 void Assembler::AddImmediate(const Address& address, const Immediate& imm, | 2388 void Assembler::AddImmediate(const Address& address, const Immediate& imm, |
2398 Register pp) { | 2389 Register pp) { |
2399 int64_t value = imm.value(); | 2390 const int64_t value = imm.value(); |
2400 if (value > 0) { | 2391 if (value == 0) { |
| 2392 return; |
| 2393 } |
| 2394 if ((value > 0) || (value == kMinInt64)) { |
2401 if (value == 1) { | 2395 if (value == 1) { |
2402 incq(address); | 2396 incq(address); |
2403 } else if (value != 0) { | 2397 } else { |
2404 if (CanLoadImmediateFromPool(imm, pp)) { | 2398 if (CanLoadImmediateFromPool(imm, pp)) { |
2405 LoadImmediate(TMP, imm, pp); | 2399 LoadImmediate(TMP, imm, pp); |
2406 addq(address, TMP); | 2400 addq(address, TMP); |
2407 } else { | 2401 } else { |
2408 addq(address, imm); | 2402 addq(address, imm); |
2409 } | 2403 } |
2410 } | 2404 } |
2411 } else if (value < 0) { | 2405 } else { |
2412 value = -value; | 2406 SubImmediate(address, Immediate(-value), pp); |
2413 if (value == 1) { | |
2414 decq(address); | |
2415 } else if (value != 0) { | |
2416 const Immediate& s = Immediate(value); | |
2417 if (CanLoadImmediateFromPool(s, pp)) { | |
2418 LoadImmediate(TMP, s, pp); | |
2419 subq(address, TMP); | |
2420 } else { | |
2421 subq(address, s); | |
2422 } | |
2423 } | |
2424 } | 2407 } |
2425 } | 2408 } |
2426 | 2409 |
| 2410 |
| 2411 void Assembler::SubImmediate(Register reg, const Immediate& imm, Register pp) { |
| 2412 const int64_t value = imm.value(); |
| 2413 if (value == 0) { |
| 2414 return; |
| 2415 } |
| 2416 if ((value > 0) || (value == kMinInt64)) { |
| 2417 if (value == 1) { |
| 2418 decq(reg); |
| 2419 } else { |
| 2420 if (CanLoadImmediateFromPool(imm, pp)) { |
| 2421 ASSERT(reg != TMP); |
| 2422 LoadImmediate(TMP, imm, pp); |
| 2423 subq(reg, TMP); |
| 2424 } else { |
| 2425 subq(reg, imm); |
| 2426 } |
| 2427 } |
| 2428 } else { |
| 2429 AddImmediate(reg, Immediate(-value), pp); |
| 2430 } |
| 2431 } |
| 2432 |
| 2433 |
| 2434 void Assembler::SubImmediate(const Address& address, const Immediate& imm, |
| 2435 Register pp) { |
| 2436 const int64_t value = imm.value(); |
| 2437 if (value == 0) { |
| 2438 return; |
| 2439 } |
| 2440 if ((value > 0) || (value == kMinInt64)) { |
| 2441 if (value == 1) { |
| 2442 decq(address); |
| 2443 } else { |
| 2444 if (CanLoadImmediateFromPool(imm, pp)) { |
| 2445 LoadImmediate(TMP, imm, pp); |
| 2446 subq(address, TMP); |
| 2447 } else { |
| 2448 subq(address, imm); |
| 2449 } |
| 2450 } |
| 2451 } else { |
| 2452 AddImmediate(address, Immediate(-value), pp); |
| 2453 } |
| 2454 } |
| 2455 |
2427 | 2456 |
2428 void Assembler::Drop(intptr_t stack_elements) { | 2457 void Assembler::Drop(intptr_t stack_elements) { |
2429 ASSERT(stack_elements >= 0); | 2458 ASSERT(stack_elements >= 0); |
2430 if (stack_elements <= 4) { | 2459 if (stack_elements <= 4) { |
2431 for (intptr_t i = 0; i < stack_elements; i++) { | 2460 for (intptr_t i = 0; i < stack_elements; i++) { |
2432 popq(TMP); | 2461 popq(TMP); |
2433 } | 2462 } |
2434 return; | 2463 return; |
2435 } | 2464 } |
2436 addq(RSP, Immediate(stack_elements * kWordSize)); | 2465 addq(RSP, Immediate(stack_elements * kWordSize)); |
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3268 | 3297 |
3269 | 3298 |
3270 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3299 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
3271 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); | 3300 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); |
3272 return xmm_reg_names[reg]; | 3301 return xmm_reg_names[reg]; |
3273 } | 3302 } |
3274 | 3303 |
3275 } // namespace dart | 3304 } // namespace dart |
3276 | 3305 |
3277 #endif // defined TARGET_ARCH_X64 | 3306 #endif // defined TARGET_ARCH_X64 |
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