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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_ARM64) | 6 #if defined(TARGET_ARCH_ARM64) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
10 #include "vm/longjump.h" | 10 #include "vm/longjump.h" |
(...skipping 666 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
677 int64_t imm = bit_cast<int64_t, double>(immd); | 677 int64_t imm = bit_cast<int64_t, double>(immd); |
678 LoadImmediate(TMP, imm, pp); | 678 LoadImmediate(TMP, imm, pp); |
679 fmovdr(vd, TMP); | 679 fmovdr(vd, TMP); |
680 } | 680 } |
681 } | 681 } |
682 | 682 |
683 | 683 |
684 void Assembler::AddImmediate( | 684 void Assembler::AddImmediate( |
685 Register dest, Register rn, int64_t imm, Register pp) { | 685 Register dest, Register rn, int64_t imm, Register pp) { |
686 Operand op; | 686 Operand op; |
687 if (imm == 0) { | |
688 if (dest != rn) { | |
689 mov(dest, rn); | |
690 } | |
691 return; | |
692 } | |
687 if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) { | 693 if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) { |
688 add(dest, rn, op); | 694 add(dest, rn, op); |
689 } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) == | 695 } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) == |
690 Operand::Immediate) { | 696 Operand::Immediate) { |
691 sub(dest, rn, op); | 697 sub(dest, rn, op); |
692 } else { | 698 } else { |
693 // TODO(zra): Try adding top 12 bits, then bottom 12 bits. | 699 // TODO(zra): Try adding top 12 bits, then bottom 12 bits. |
694 ASSERT(rn != TMP2); | 700 ASSERT(rn != TMP2); |
695 LoadImmediate(TMP2, imm, pp); | 701 LoadImmediate(TMP2, imm, pp); |
696 add(dest, rn, Operand(TMP2)); | 702 add(dest, rn, Operand(TMP2)); |
697 } | 703 } |
698 } | 704 } |
699 | 705 |
700 | 706 |
701 void Assembler::AddImmediateSetFlags( | 707 void Assembler::AddImmediateSetFlags( |
702 Register dest, Register rn, int64_t imm, Register pp) { | 708 Register dest, Register rn, int64_t imm, Register pp) { |
703 Operand op; | 709 Operand op; |
704 if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) { | 710 if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) { |
zra
2014/05/14 19:40:55
ditto
regis
2014/05/14 19:54:53
Done.
| |
705 adds(dest, rn, op); | 711 adds(dest, rn, op); |
706 } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) == | 712 } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) == |
707 Operand::Immediate) { | 713 Operand::Immediate) { |
714 ASSERT(imm != kMinInt64); // Would cause erroneous overflow detection. | |
708 subs(dest, rn, op); | 715 subs(dest, rn, op); |
709 } else { | 716 } else { |
zra
2014/05/14 19:40:55
ASSERT(imm != kMinInt64);
regis
2014/05/14 19:54:53
It would not be a problem here, since we emit an a
| |
710 // TODO(zra): Try adding top 12 bits, then bottom 12 bits. | 717 // TODO(zra): Try adding top 12 bits, then bottom 12 bits. |
711 ASSERT(rn != TMP2); | 718 ASSERT(rn != TMP2); |
712 LoadImmediate(TMP2, imm, pp); | 719 LoadImmediate(TMP2, imm, pp); |
713 adds(dest, rn, Operand(TMP2)); | 720 adds(dest, rn, Operand(TMP2)); |
714 } | 721 } |
715 } | 722 } |
716 | 723 |
717 | 724 |
725 void Assembler::SubImmediateSetFlags( | |
726 Register dest, Register rn, int64_t imm, Register pp) { | |
727 Operand op; | |
728 if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) { | |
zra
2014/05/14 19:40:55
ditto
regis
2014/05/14 19:54:53
Done.
| |
729 subs(dest, rn, op); | |
730 } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) == | |
731 Operand::Immediate) { | |
732 ASSERT(imm != kMinInt64); // Would cause erroneous overflow detection. | |
733 adds(dest, rn, op); | |
734 } else { | |
zra
2014/05/14 19:40:55
ASSERT(imm != kMinInt64);
regis
2014/05/14 19:54:53
It would not be a problem here, since we emit a su
| |
735 // TODO(zra): Try subtracting top 12 bits, then bottom 12 bits. | |
736 ASSERT(rn != TMP2); | |
737 LoadImmediate(TMP2, imm, pp); | |
738 subs(dest, rn, Operand(TMP2)); | |
739 } | |
740 } | |
741 | |
742 | |
718 void Assembler::AndImmediate( | 743 void Assembler::AndImmediate( |
719 Register rd, Register rn, int64_t imm, Register pp) { | 744 Register rd, Register rn, int64_t imm, Register pp) { |
720 Operand imm_op; | 745 Operand imm_op; |
721 if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) { | 746 if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) { |
722 andi(rd, rn, imm); | 747 andi(rd, rn, imm); |
723 } else { | 748 } else { |
724 LoadImmediate(TMP, imm, pp); | 749 LoadImmediate(TMP, imm, pp); |
725 and_(rd, rn, Operand(TMP)); | 750 and_(rd, rn, Operand(TMP)); |
726 } | 751 } |
727 } | 752 } |
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1324 LoadImmediate(TMP, tags, pp); | 1349 LoadImmediate(TMP, tags, pp); |
1325 StoreFieldToOffset(TMP, instance_reg, Object::tags_offset(), pp); | 1350 StoreFieldToOffset(TMP, instance_reg, Object::tags_offset(), pp); |
1326 } else { | 1351 } else { |
1327 b(failure); | 1352 b(failure); |
1328 } | 1353 } |
1329 } | 1354 } |
1330 | 1355 |
1331 } // namespace dart | 1356 } // namespace dart |
1332 | 1357 |
1333 #endif // defined TARGET_ARCH_ARM64 | 1358 #endif // defined TARGET_ARCH_ARM64 |
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