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Side by Side Diff: src/compiler/arm64/instruction-selector-arm64.cc

Issue 2815853002: [arm64] Fix another ubfx corner case. (Closed)
Patch Set: Created 3 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/assembler-inl.h" 5 #include "src/assembler-inl.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/compiler/node-properties.h" 8 #include "src/compiler/node-properties.h"
9 9
10 namespace v8 { 10 namespace v8 {
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912 912
913 913
914 void InstructionSelector::VisitWord32And(Node* node) { 914 void InstructionSelector::VisitWord32And(Node* node) {
915 Arm64OperandGenerator g(this); 915 Arm64OperandGenerator g(this);
916 Int32BinopMatcher m(node); 916 Int32BinopMatcher m(node);
917 if (m.left().IsWord32Shr() && CanCover(node, m.left().node()) && 917 if (m.left().IsWord32Shr() && CanCover(node, m.left().node()) &&
918 m.right().HasValue()) { 918 m.right().HasValue()) {
919 uint32_t mask = m.right().Value(); 919 uint32_t mask = m.right().Value();
920 uint32_t mask_width = base::bits::CountPopulation32(mask); 920 uint32_t mask_width = base::bits::CountPopulation32(mask);
921 uint32_t mask_msb = base::bits::CountLeadingZeros32(mask); 921 uint32_t mask_msb = base::bits::CountLeadingZeros32(mask);
922 if ((mask_width != 0) && (mask_msb + mask_width == 32)) { 922 if ((mask_width != 0) && (mask_width != 32) &&
923 (mask_msb + mask_width == 32)) {
923 // The mask must be contiguous, and occupy the least-significant bits. 924 // The mask must be contiguous, and occupy the least-significant bits.
924 DCHECK_EQ(0u, base::bits::CountTrailingZeros32(mask)); 925 DCHECK_EQ(0u, base::bits::CountTrailingZeros32(mask));
925 926
926 // Select Ubfx for And(Shr(x, imm), mask) where the mask is in the least 927 // Select Ubfx for And(Shr(x, imm), mask) where the mask is in the least
927 // significant bits. 928 // significant bits.
928 Int32BinopMatcher mleft(m.left().node()); 929 Int32BinopMatcher mleft(m.left().node());
929 if (mleft.right().HasValue()) { 930 if (mleft.right().HasValue()) {
930 // Any shift value can match; int32 shifts use `value % 32`. 931 // Any shift value can match; int32 shifts use `value % 32`.
931 uint32_t lsb = mleft.right().Value() & 0x1f; 932 uint32_t lsb = mleft.right().Value() & 0x1f;
932 933
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2864 // static 2865 // static
2865 MachineOperatorBuilder::AlignmentRequirements 2866 MachineOperatorBuilder::AlignmentRequirements
2866 InstructionSelector::AlignmentRequirements() { 2867 InstructionSelector::AlignmentRequirements() {
2867 return MachineOperatorBuilder::AlignmentRequirements:: 2868 return MachineOperatorBuilder::AlignmentRequirements::
2868 FullUnalignedAccessSupport(); 2869 FullUnalignedAccessSupport();
2869 } 2870 }
2870 2871
2871 } // namespace compiler 2872 } // namespace compiler
2872 } // namespace internal 2873 } // namespace internal
2873 } // namespace v8 2874 } // namespace v8
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