Revert of [ARM] Implement D-register versions of vzip, vuzp, and vtrn.

src/arm/simulator-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdarg.h>
 #include <stdlib.h>
 #include <cmath>
 
 #if V8_TARGET_ARCH_ARM
 
@@ skipping 878 matching lines @@
   DCHECK((dreg >= 0) && (dreg < DwVfpRegister::NumRegisters()));
   memcpy(value, vfp_registers_ + dreg * 2, sizeof(*value) * 2);
 }
 
 
 void Simulator::set_d_register(int dreg, const uint32_t* value) {
   DCHECK((dreg >= 0) && (dreg < DwVfpRegister::NumRegisters()));
   memcpy(vfp_registers_ + dreg * 2, value, sizeof(*value) * 2);
 }
 
-template <typename T, int SIZE>
-void Simulator::get_neon_register(int reg, T (&value)[SIZE / sizeof(T)]) {
-  DCHECK(SIZE == kSimd128Size || SIZE == kDoubleSize);
-  DCHECK_LE(0, reg);
-  DCHECK_GT(SIZE == kSimd128Size ? num_q_registers : num_d_registers, reg);
-  memcpy(value, vfp_registers_ + reg * (SIZE / 4), SIZE);
+template <typename T>
+void Simulator::get_d_register(int dreg, T* value) {
+  DCHECK((dreg >= 0) && (dreg < num_d_registers));
+  memcpy(value, vfp_registers_ + dreg * 2, kDoubleSize);
 }
 
-template <typename T, int SIZE>
-void Simulator::set_neon_register(int reg, const T (&value)[SIZE / sizeof(T)]) {
-  DCHECK(SIZE == kSimd128Size || SIZE == kDoubleSize);
-  DCHECK_LE(0, reg);
-  DCHECK_GT(SIZE == kSimd128Size ? num_q_registers : num_d_registers, reg);
-  memcpy(vfp_registers_ + reg * (SIZE / 4), value, SIZE);
+template <typename T>
+void Simulator::set_d_register(int dreg, const T* value) {
+  DCHECK((dreg >= 0) && (dreg < num_d_registers));
+  memcpy(vfp_registers_ + dreg * 2, value, kDoubleSize);
+}
+
+template <typename T>
+void Simulator::get_q_register(int qreg, T* value) {
+  DCHECK((qreg >= 0) && (qreg < num_q_registers));
+  memcpy(value, vfp_registers_ + qreg * 4, kSimd128Size);
+}
+
+template <typename T>
+void Simulator::set_q_register(int qreg, const T* value) {
+  DCHECK((qreg >= 0) && (qreg < num_q_registers));
+  memcpy(vfp_registers_ + qreg * 4, value, kSimd128Size);
 }
 
 // Raw access to the PC register.
 void Simulator::set_pc(int32_t value) {
   pc_modified_ = true;
   registers_[pc] = value;
 }
 
 
 bool Simulator::has_bad_pc() const {
@@ skipping 2570 matching lines @@
           case Neon32: {
             for (int i = 0; i < 4; i++) {
               q_data[i] = rt_value;
             }
             break;
           }
           default:
             UNREACHABLE();
             break;
         }
-        set_neon_register(vd, q_data);
+        set_q_register(vd, q_data);
       }
     } else if ((instr->VLValue() == 0x1) && (instr->VCValue() == 0x1)) {
       // vmov (scalar to ARM core register)
       int vn = instr->VFPNRegValue(kDoublePrecision);
       int rt = instr->RtValue();
       int opc1_opc2 = (instr->Bits(22, 21) << 2) | instr->Bits(6, 5);
       uint64_t data;
       get_d_register(vn, &data);
       if ((opc1_opc2 & 0xb) == 0) {
         // NeonS32 / NeonU32
@@ skipping 466 matching lines @@
         break;
       default:
         UNIMPLEMENTED();  // Not used by V8.
     }
   } else {
     UNIMPLEMENTED();  // Not used by V8.
   }
 }
 
 // Templated operations for NEON instructions.
+// TODO(bbudge) Add more templates for use in DecodeSpecialCondition.
 template <typename T, typename U>
 U Widen(T value) {
   static_assert(sizeof(int64_t) > sizeof(T), "T must be int32_t or smaller");
   static_assert(sizeof(U) > sizeof(T), "T must smaller than U");
   return static_cast<U>(value);
 }
 
 template <typename T, typename U>
 U Narrow(T value) {
   static_assert(sizeof(int8_t) < sizeof(T), "T must be int16_t or larger");
   static_assert(sizeof(U) < sizeof(T), "T must larger than U");
   static_assert(std::is_unsigned<T>() == std::is_unsigned<U>(),
                 "Signed-ness of T and U must match");
   // Make sure value can be expressed in the smaller type; otherwise, the
   // casted result is implementation defined.
   DCHECK_LE(std::numeric_limits<T>::min(), value);
   DCHECK_GE(std::numeric_limits<T>::max(), value);
   return static_cast<U>(value);
 }
 
 template <typename T>
 T Clamp(int64_t value) {
   static_assert(sizeof(int64_t) > sizeof(T), "T must be int32_t or smaller");
   int64_t min = static_cast<int64_t>(std::numeric_limits<T>::min());
   int64_t max = static_cast<int64_t>(std::numeric_limits<T>::max());
   int64_t clamped = std::max(min, std::min(max, value));
   return static_cast<T>(clamped);
 }
 
+template <typename T>
+T MinMax(T a, T b, bool is_min) {
+  return is_min ? std::min(a, b) : std::max(a, b);
+}
+
 template <typename T, typename U>
 void Widen(Simulator* simulator, int Vd, int Vm) {
   static const int kLanes = 8 / sizeof(T);
   T src[kLanes];
   U dst[kLanes];
-  simulator->get_neon_register<T, kDoubleSize>(Vm, src);
+  simulator->get_d_register(Vm, src);
   for (int i = 0; i < kLanes; i++) {
     dst[i] = Widen<T, U>(src[i]);
   }
-  simulator->set_neon_register(Vd, dst);
-}
-
-template <typename T, int SIZE>
-void Abs(Simulator* simulator, int Vd, int Vm) {
-  static const int kElems = SIZE / sizeof(T);
-  T src[kElems];
-  simulator->get_neon_register<T, SIZE>(Vm, src);
-  for (int i = 0; i < kElems; i++) {
-    src[i] = std::abs(src[i]);
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src);
-}
-
-template <typename T, int SIZE>
-void Neg(Simulator* simulator, int Vd, int Vm) {
-  static const int kElems = SIZE / sizeof(T);
-  T src[kElems];
-  simulator->get_neon_register<T, SIZE>(Vm, src);
-  for (int i = 0; i < kElems; i++) {
-    src[i] = -src[i];
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src);
+  simulator->set_q_register(Vd, dst);
 }
 
 template <typename T, typename U>
 void SaturatingNarrow(Simulator* simulator, int Vd, int Vm) {
   static const int kLanes = 16 / sizeof(T);
   T src[kLanes];
   U dst[kLanes];
-  simulator->get_neon_register(Vm, src);
+  simulator->get_q_register(Vm, src);
   for (int i = 0; i < kLanes; i++) {
     dst[i] = Narrow<T, U>(Clamp<U>(src[i]));
   }
-  simulator->set_neon_register<U, kDoubleSize>(Vd, dst);
+  simulator->set_d_register(Vd, dst);
 }
 
 template <typename T>
 void AddSaturate(Simulator* simulator, int Vd, int Vm, int Vn) {
   static const int kLanes = 16 / sizeof(T);
   T src1[kLanes], src2[kLanes];
-  simulator->get_neon_register(Vn, src1);
-  simulator->get_neon_register(Vm, src2);
+  simulator->get_q_register(Vn, src1);
+  simulator->get_q_register(Vm, src2);
   for (int i = 0; i < kLanes; i++) {
     src1[i] = Clamp<T>(Widen<T, int64_t>(src1[i]) + Widen<T, int64_t>(src2[i]));
   }
-  simulator->set_neon_register(Vd, src1);
+  simulator->set_q_register(Vd, src1);
 }
 
 template <typename T>
 void SubSaturate(Simulator* simulator, int Vd, int Vm, int Vn) {
   static const int kLanes = 16 / sizeof(T);
   T src1[kLanes], src2[kLanes];
-  simulator->get_neon_register(Vn, src1);
-  simulator->get_neon_register(Vm, src2);
+  simulator->get_q_register(Vn, src1);
+  simulator->get_q_register(Vm, src2);
   for (int i = 0; i < kLanes; i++) {
     src1[i] = Clamp<T>(Widen<T, int64_t>(src1[i]) - Widen<T, int64_t>(src2[i]));
   }
-  simulator->set_neon_register(Vd, src1);
-}
-
-template <typename T, int SIZE>
-void Zip(Simulator* simulator, int Vd, int Vm) {
-  static const int kElems = SIZE / sizeof(T);
-  static const int kPairs = kElems / 2;
-  T src1[kElems], src2[kElems], dst1[kElems], dst2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vd, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kPairs; i++) {
-    dst1[i * 2] = src1[i];
-    dst1[i * 2 + 1] = src2[i];
-    dst2[i * 2] = src1[i + kPairs];
-    dst2[i * 2 + 1] = src2[i + kPairs];
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, dst1);
-  simulator->set_neon_register<T, SIZE>(Vm, dst2);
-}
-
-template <typename T, int SIZE>
-void Unzip(Simulator* simulator, int Vd, int Vm) {
-  static const int kElems = SIZE / sizeof(T);
-  static const int kPairs = kElems / 2;
-  T src1[kElems], src2[kElems], dst1[kElems], dst2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vd, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kPairs; i++) {
-    dst1[i] = src1[i * 2];
-    dst1[i + kPairs] = src2[i * 2];
-    dst2[i] = src1[i * 2 + 1];
-    dst2[i + kPairs] = src2[i * 2 + 1];
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, dst1);
-  simulator->set_neon_register<T, SIZE>(Vm, dst2);
-}
-
-template <typename T, int SIZE>
-void Transpose(Simulator* simulator, int Vd, int Vm) {
-  static const int kElems = SIZE / sizeof(T);
-  static const int kPairs = kElems / 2;
-  T src1[kElems], src2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vd, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kPairs; i++) {
-    std::swap(src1[2 * i + 1], src2[2 * i]);
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src1);
-  simulator->set_neon_register<T, SIZE>(Vm, src2);
-}
-
-template <typename T, int SIZE>
-void Test(Simulator* simulator, int Vd, int Vm, int Vn) {
-  static const int kElems = SIZE / sizeof(T);
-  T src1[kElems], src2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vn, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kElems; i++) {
-    src1[i] = (src1[i] & src2[i]) != 0 ? -1 : 0;
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src1);
-}
-
-template <typename T, int SIZE>
-void Add(Simulator* simulator, int Vd, int Vm, int Vn) {
-  static const int kElems = SIZE / sizeof(T);
-  T src1[kElems], src2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vn, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kElems; i++) {
-    src1[i] += src2[i];
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src1);
-}
-
-template <typename T, int SIZE>
-void Sub(Simulator* simulator, int Vd, int Vm, int Vn) {
-  static const int kElems = SIZE / sizeof(T);
-  T src1[kElems], src2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vn, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kElems; i++) {
-    src1[i] -= src2[i];
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src1);
-}
-
-template <typename T, int SIZE>
-void Mul(Simulator* simulator, int Vd, int Vm, int Vn) {
-  static const int kElems = SIZE / sizeof(T);
-  T src1[kElems], src2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vn, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kElems; i++) {
-    src1[i] *= src2[i];
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src1);
-}
-
-template <typename T, int SIZE>
-void ShiftLeft(Simulator* simulator, int Vd, int Vm, int shift) {
-  static const int kElems = SIZE / sizeof(T);
-  T src[kElems];
-  simulator->get_neon_register<T, SIZE>(Vm, src);
-  for (int i = 0; i < kElems; i++) {
-    src[i] <<= shift;
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src);
-}
-
-template <typename T, int SIZE>
-void ShiftRight(Simulator* simulator, int Vd, int Vm, int shift) {
-  static const int kElems = SIZE / sizeof(T);
-  T src[kElems];
-  simulator->get_neon_register<T, SIZE>(Vm, src);
-  for (int i = 0; i < kElems; i++) {
-    src[i] >>= shift;
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src);
-}
-
-template <typename T, int SIZE>
-void ArithmeticShiftRight(Simulator* simulator, int Vd, int Vm, int shift) {
-  static const int kElems = SIZE / sizeof(T);
-  T src[kElems];
-  simulator->get_neon_register<T, SIZE>(Vm, src);
-  for (int i = 0; i < kElems; i++) {
-    src[i] = ArithmeticShiftRight(src[i], shift);
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src);
-}
-
-template <typename T, int SIZE>
-void CompareEqual(Simulator* simulator, int Vd, int Vm, int Vn) {
-  static const int kElems = SIZE / sizeof(T);
-  T src1[kElems], src2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vn, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kElems; i++) {
-    src1[i] = src1[i] == src2[i] ? -1 : 0;
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src1);
-}
-
-template <typename T, int SIZE>
-void CompareGreater(Simulator* simulator, int Vd, int Vm, int Vn, bool ge) {
-  static const int kElems = SIZE / sizeof(T);
-  T src1[kElems], src2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vn, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kElems; i++) {
-    if (ge)
-      src1[i] = src1[i] >= src2[i] ? -1 : 0;
-    else
-      src1[i] = src1[i] > src2[i] ? -1 : 0;
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src1);
-}
-
-template <typename T>
-T MinMax(T a, T b, bool is_min) {
-  return is_min ? std::min(a, b) : std::max(a, b);
-}
-
-template <typename T, int SIZE>
-void MinMax(Simulator* simulator, int Vd, int Vm, int Vn, bool min) {
-  static const int kElems = SIZE / sizeof(T);
-  T src1[kElems], src2[kElems];
-  simulator->get_neon_register<T, SIZE>(Vn, src1);
-  simulator->get_neon_register<T, SIZE>(Vm, src2);
-  for (int i = 0; i < kElems; i++) {
-    src1[i] = MinMax(src1[i], src2[i], min);
-  }
-  simulator->set_neon_register<T, SIZE>(Vd, src1);
-}
-
-template <typename T>
-void PairwiseMinMax(Simulator* simulator, int Vd, int Vm, int Vn, bool min) {
-  static const int kElems = kDoubleSize / sizeof(T);
-  static const int kPairs = kElems / 2;
-  T dst[kElems], src1[kElems], src2[kElems];
-  simulator->get_neon_register<T, kDoubleSize>(Vn, src1);
-  simulator->get_neon_register<T, kDoubleSize>(Vm, src2);
-  for (int i = 0; i < kPairs; i++) {
-    dst[i] = MinMax(src1[i * 2], src1[i * 2 + 1], min);
-    dst[i + kPairs] = MinMax(src2[i * 2], src2[i * 2 + 1], min);
-  }
-  simulator->set_neon_register<T, kDoubleSize>(Vd, dst);
+  simulator->set_q_register(Vd, src1);
 }
 
 void Simulator::DecodeSpecialCondition(Instruction* instr) {
   switch (instr->SpecialValue()) {
     case 4: {
       int Vd, Vm, Vn;
       if (instr->Bit(6) == 0) {
         Vd = instr->VFPDRegValue(kDoublePrecision);
         Vm = instr->VFPMRegValue(kDoublePrecision);
         Vn = instr->VFPNRegValue(kDoublePrecision);
@@ skipping 25 matching lines @@
             UNIMPLEMENTED();
           }
           break;
         }
         case 0x1: {
           if (instr->Bits(21, 20) == 2 && instr->Bit(6) == 1 &&
               instr->Bit(4) == 1) {
             // vmov Qd, Qm.
             // vorr, Qd, Qm, Qn.
             uint32_t src1[4];
-            get_neon_register(Vm, src1);
+            get_q_register(Vm, src1);
             if (Vm != Vn) {
               uint32_t src2[4];
-              get_neon_register(Vn, src2);
+              get_q_register(Vn, src2);
               for (int i = 0; i < 4; i++) {
                 src1[i] = src1[i] | src2[i];
               }
             }
-            set_neon_register(Vd, src1);
+            set_q_register(Vd, src1);
           } else if (instr->Bits(21, 20) == 0 && instr->Bit(6) == 1 &&
                      instr->Bit(4) == 1) {
             // vand Qd, Qm, Qn.
             uint32_t src1[4], src2[4];
-            get_neon_register(Vn, src1);
-            get_neon_register(Vm, src2);
+            get_q_register(Vn, src1);
+            get_q_register(Vm, src2);
             for (int i = 0; i < 4; i++) {
               src1[i] = src1[i] & src2[i];
             }
-            set_neon_register(Vd, src1);
+            set_q_register(Vd, src1);
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         case 0x2: {
           if (instr->Bit(4) == 1) {
             // vqsub.s<size> Qd, Qm, Qn.
             NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
             switch (size) {
@@ skipping 13 matching lines @@
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         case 0x3: {
           // vcge/vcgt.s<size> Qd, Qm, Qn.
           bool ge = instr->Bit(4) == 1;
           NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
           switch (size) {
-            case Neon8:
-              CompareGreater<int8_t, kSimd128Size>(this, Vd, Vm, Vn, ge);
+            case Neon8: {
+              int8_t src1[16], src2[16];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 16; i++) {
+                if (ge)
+                  src1[i] = src1[i] >= src2[i] ? 0xFF : 0;
+                else
+                  src1[i] = src1[i] > src2[i] ? 0xFF : 0;
+              }
+              set_q_register(Vd, src1);
               break;
-            case Neon16:
-              CompareGreater<int16_t, kSimd128Size>(this, Vd, Vm, Vn, ge);
+            }
+            case Neon16: {
+              int16_t src1[8], src2[8];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 8; i++) {
+                if (ge)
+                  src1[i] = src1[i] >= src2[i] ? 0xFFFF : 0;
+                else
+                  src1[i] = src1[i] > src2[i] ? 0xFFFF : 0;
+              }
+              set_q_register(Vd, src1);
               break;
-            case Neon32:
-              CompareGreater<int32_t, kSimd128Size>(this, Vd, Vm, Vn, ge);
+            }
+            case Neon32: {
+              int32_t src1[4], src2[4];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 4; i++) {
+                if (ge)
+                  src1[i] = src1[i] >= src2[i] ? 0xFFFFFFFF : 0;
+                else
+                  src1[i] = src1[i] > src2[i] ? 0xFFFFFFFF : 0;
+              }
+              set_q_register(Vd, src1);
               break;
+            }
             default:
               UNREACHABLE();
               break;
           }
           break;
         }
         case 0x6: {
           // vmin/vmax.s<size> Qd, Qm, Qn.
           NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
           bool min = instr->Bit(4) != 0;
           switch (size) {
-            case Neon8:
-              MinMax<int8_t, kSimd128Size>(this, Vd, Vm, Vn, min);
+            case Neon8: {
+              int8_t src1[16], src2[16];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 16; i++) {
+                src1[i] = MinMax(src1[i], src2[i], min);
+              }
+              set_q_register(Vd, src1);
               break;
-            case Neon16:
-              MinMax<int16_t, kSimd128Size>(this, Vd, Vm, Vn, min);
+            }
+            case Neon16: {
+              int16_t src1[8], src2[8];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 8; i++) {
+                src1[i] = MinMax(src1[i], src2[i], min);
+              }
+              set_q_register(Vd, src1);
               break;
-            case Neon32:
-              MinMax<int32_t, kSimd128Size>(this, Vd, Vm, Vn, min);
+            }
+            case Neon32: {
+              int32_t src1[4], src2[4];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 4; i++) {
+                src1[i] = MinMax(src1[i], src2[i], min);
+              }
+              set_q_register(Vd, src1);
               break;
+            }
             default:
               UNREACHABLE();
               break;
           }
           break;
         }
         case 0x8: {
           // vadd/vtst
           NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
           if (instr->Bit(4) == 0) {
             // vadd.i<size> Qd, Qm, Qn.
             switch (size) {
-              case Neon8:
-                Add<uint8_t, kSimd128Size>(this, Vd, Vm, Vn);
+              case Neon8: {
+                uint8_t src1[16], src2[16];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 16; i++) {
+                  src1[i] += src2[i];
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon16:
-                Add<uint16_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon16: {
+                uint16_t src1[8], src2[8];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 8; i++) {
+                  src1[i] += src2[i];
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon32:
-                Add<uint32_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon32: {
+                uint32_t src1[4], src2[4];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 4; i++) {
+                  src1[i] += src2[i];
+                }
+                set_q_register(Vd, src1);
                 break;
+              }
               default:
                 UNREACHABLE();
                 break;
             }
           } else {
             // vtst.i<size> Qd, Qm, Qn.
             switch (size) {
-              case Neon8:
-                Test<uint8_t, kSimd128Size>(this, Vd, Vm, Vn);
+              case Neon8: {
+                uint8_t src1[16], src2[16];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 16; i++) {
+                  src1[i] = (src1[i] & src2[i]) != 0 ? 0xFFu : 0;
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon16:
-                Test<uint16_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon16: {
+                uint16_t src1[8], src2[8];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 8; i++) {
+                  src1[i] = (src1[i] & src2[i]) != 0 ? 0xFFFFu : 0;
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon32:
-                Test<uint32_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon32: {
+                uint32_t src1[4], src2[4];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 4; i++) {
+                  src1[i] = (src1[i] & src2[i]) != 0 ? 0xFFFFFFFFu : 0;
+                }
+                set_q_register(Vd, src1);
                 break;
+              }
               default:
                 UNREACHABLE();
                 break;
             }
           }
           break;
         }
         case 0x9: {
           if (instr->Bit(6) == 1 && instr->Bit(4) == 1) {
             // vmul.i<size> Qd, Qm, Qn.
             NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
             switch (size) {
-              case Neon8:
-                Mul<uint8_t, kSimd128Size>(this, Vd, Vm, Vn);
+              case Neon8: {
+                uint8_t src1[16], src2[16];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 16; i++) {
+                  src1[i] *= src2[i];
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon16:
-                Mul<uint16_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon16: {
+                uint16_t src1[8], src2[8];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 8; i++) {
+                  src1[i] *= src2[i];
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon32:
-                Mul<uint32_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon32: {
+                uint32_t src1[4], src2[4];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 4; i++) {
+                  src1[i] *= src2[i];
+                }
+                set_q_register(Vd, src1);
                 break;
+              }
               default:
                 UNREACHABLE();
                 break;
             }
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         case 0xa: {
           // vpmin/vpmax.s<size> Dd, Dm, Dn.
           NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
           bool min = instr->Bit(4) != 0;
           switch (size) {
-            case Neon8:
-              PairwiseMinMax<int8_t>(this, Vd, Vm, Vn, min);
+            case Neon8: {
+              int8_t dst[8], src1[8], src2[8];
+              get_d_register(Vn, src1);
+              get_d_register(Vm, src2);
+              for (int i = 0; i < 4; i++) {
+                dst[i + 0] = MinMax(src1[i * 2], src1[i * 2 + 1], min);
+                dst[i + 4] = MinMax(src2[i * 2], src2[i * 2 + 1], min);
+              }
+              set_d_register(Vd, dst);
               break;
-            case Neon16:
-              PairwiseMinMax<int16_t>(this, Vd, Vm, Vn, min);
+            }
+            case Neon16: {
+              int16_t dst[4], src1[4], src2[4];
+              get_d_register(Vn, src1);
+              get_d_register(Vm, src2);
+              for (int i = 0; i < 2; i++) {
+                dst[i + 0] = MinMax(src1[i * 2], src1[i * 2 + 1], min);
+                dst[i + 2] = MinMax(src2[i * 2], src2[i * 2 + 1], min);
+              }
+              set_d_register(Vd, dst);
               break;
-            case Neon32:
-              PairwiseMinMax<int32_t>(this, Vd, Vm, Vn, min);
+            }
+            case Neon32: {
+              int32_t dst[2], src1[2], src2[2];
+              get_d_register(Vn, src1);
+              get_d_register(Vm, src2);
+              dst[0] = MinMax(src1[0], src1[1], min);
+              dst[1] = MinMax(src2[0], src2[1], min);
+              set_d_register(Vd, dst);
               break;
+            }
             default:
               UNREACHABLE();
               break;
           }
           break;
         }
         case 0xd: {
           if (instr->Bit(4) == 0) {
             float src1[4], src2[4];
-            get_neon_register(Vn, src1);
-            get_neon_register(Vm, src2);
+            get_q_register(Vn, src1);
+            get_q_register(Vm, src2);
             for (int i = 0; i < 4; i++) {
               if (instr->Bit(21) == 0) {
                 // vadd.f32 Qd, Qm, Qn.
                 src1[i] = src1[i] + src2[i];
               } else {
                 // vsub.f32 Qd, Qm, Qn.
                 src1[i] = src1[i] - src2[i];
               }
             }
-            set_neon_register(Vd, src1);
+            set_q_register(Vd, src1);
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         case 0xe: {
           if (instr->Bits(21, 20) == 0 && instr->Bit(4) == 0) {
             // vceq.f32.
             float src1[4], src2[4];
-            get_neon_register(Vn, src1);
-            get_neon_register(Vm, src2);
+            get_q_register(Vn, src1);
+            get_q_register(Vm, src2);
             uint32_t dst[4];
             for (int i = 0; i < 4; i++) {
               dst[i] = (src1[i] == src2[i]) ? 0xFFFFFFFF : 0;
             }
-            set_neon_register(Vd, dst);
+            set_q_register(Vd, dst);
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         case 0xf: {
           if (instr->Bit(20) == 0 && instr->Bit(6) == 1) {
             float src1[4], src2[4];
-            get_neon_register(Vn, src1);
-            get_neon_register(Vm, src2);
+            get_q_register(Vn, src1);
+            get_q_register(Vm, src2);
             if (instr->Bit(4) == 1) {
               if (instr->Bit(21) == 0) {
                 // vrecps.f32 Qd, Qm, Qn.
                 for (int i = 0; i < 4; i++) {
                   src1[i] = 2.0f - src1[i] * src2[i];
                 }
               } else {
                 // vrsqrts.f32 Qd, Qm, Qn.
                 for (int i = 0; i < 4; i++) {
                   src1[i] = (3.0f - src1[i] * src2[i]) * 0.5f;
                 }
               }
             } else {
               // vmin/vmax.f32 Qd, Qm, Qn.
               bool min = instr->Bit(21) == 1;
               for (int i = 0; i < 4; i++) {
                 src1[i] = MinMax(src1[i], src2[i], min);
               }
             }
-            set_neon_register(Vd, src1);
+            set_q_register(Vd, src1);
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         default:
           UNIMPLEMENTED();
           break;
       }
       break;
@@ skipping 20 matching lines @@
             UNIMPLEMENTED();
             break;
         }
       } else if (instr->Bits(21, 20) == 3 && instr->Bit(4) == 0) {
         // vext.
         int imm4 = instr->Bits(11, 8);
         int Vd = instr->VFPDRegValue(kSimd128Precision);
         int Vm = instr->VFPMRegValue(kSimd128Precision);
         int Vn = instr->VFPNRegValue(kSimd128Precision);
         uint8_t src1[16], src2[16], dst[16];
-        get_neon_register(Vn, src1);
-        get_neon_register(Vm, src2);
+        get_q_register(Vn, src1);
+        get_q_register(Vm, src2);
         int boundary = kSimd128Size - imm4;
         int i = 0;
         for (; i < boundary; i++) {
           dst[i] = src1[i + imm4];
         }
         for (; i < 16; i++) {
           dst[i] = src2[i - boundary];
         }
-        set_neon_register(Vd, dst);
+        set_q_register(Vd, dst);
       } else if (instr->Bits(11, 7) == 0xA && instr->Bit(4) == 1) {
         // vshl.i<size> Qd, Qm, shift
         int size = base::bits::RoundDownToPowerOfTwo32(instr->Bits(21, 16));
         int shift = instr->Bits(21, 16) - size;
         int Vd = instr->VFPDRegValue(kSimd128Precision);
         int Vm = instr->VFPMRegValue(kSimd128Precision);
         NeonSize ns = static_cast<NeonSize>(size / 16);
         switch (ns) {
-          case Neon8:
-            ShiftLeft<uint8_t, kSimd128Size>(this, Vd, Vm, shift);
+          case Neon8: {
+            uint8_t src[16];
+            get_q_register(Vm, src);
+            for (int i = 0; i < 16; i++) {
+              src[i] <<= shift;
+            }
+            set_q_register(Vd, src);
             break;
-          case Neon16:
-            ShiftLeft<uint16_t, kSimd128Size>(this, Vd, Vm, shift);
+          }
+          case Neon16: {
+            uint16_t src[8];
+            get_q_register(Vm, src);
+            for (int i = 0; i < 8; i++) {
+              src[i] <<= shift;
+            }
+            set_q_register(Vd, src);
             break;
-          case Neon32:
-            ShiftLeft<uint32_t, kSimd128Size>(this, Vd, Vm, shift);
+          }
+          case Neon32: {
+            uint32_t src[4];
+            get_q_register(Vm, src);
+            for (int i = 0; i < 4; i++) {
+              src[i] <<= shift;
+            }
+            set_q_register(Vd, src);
             break;
+          }
           default:
             UNREACHABLE();
             break;
         }
       } else if (instr->Bits(11, 7) == 0 && instr->Bit(4) == 1) {
         // vshr.s<size> Qd, Qm, shift
         int size = base::bits::RoundDownToPowerOfTwo32(instr->Bits(21, 16));
         int shift = 2 * size - instr->Bits(21, 16);
         int Vd = instr->VFPDRegValue(kSimd128Precision);
         int Vm = instr->VFPMRegValue(kSimd128Precision);
         NeonSize ns = static_cast<NeonSize>(size / 16);
         switch (ns) {
-          case Neon8:
-            ArithmeticShiftRight<int8_t, kSimd128Size>(this, Vd, Vm, shift);
+          case Neon8: {
+            int8_t src[16];
+            get_q_register(Vm, src);
+            for (int i = 0; i < 16; i++) {
+              src[i] = ArithmeticShiftRight(src[i], shift);
+            }
+            set_q_register(Vd, src);
             break;
-          case Neon16:
-            ArithmeticShiftRight<int16_t, kSimd128Size>(this, Vd, Vm, shift);
+          }
+          case Neon16: {
+            int16_t src[8];
+            get_q_register(Vm, src);
+            for (int i = 0; i < 8; i++) {
+              src[i] = ArithmeticShiftRight(src[i], shift);
+            }
+            set_q_register(Vd, src);
             break;
-          case Neon32:
-            ArithmeticShiftRight<int32_t, kSimd128Size>(this, Vd, Vm, shift);
+          }
+          case Neon32: {
+            int32_t src[4];
+            get_q_register(Vm, src);
+            for (int i = 0; i < 4; i++) {
+              src[i] = ArithmeticShiftRight(src[i], shift);
+            }
+            set_q_register(Vd, src);
             break;
+          }
           default:
             UNREACHABLE();
             break;
         }
       } else {
         UNIMPLEMENTED();
       }
       break;
     case 6: {
       int Vd, Vm, Vn;
@@ skipping 27 matching lines @@
             }
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         case 0x1: {
           if (instr->Bits(21, 20) == 1 && instr->Bit(4) == 1) {
             // vbsl.size Qd, Qm, Qn.
             uint32_t dst[4], src1[4], src2[4];
-            get_neon_register(Vd, dst);
-            get_neon_register(Vn, src1);
-            get_neon_register(Vm, src2);
+            get_q_register(Vd, dst);
+            get_q_register(Vn, src1);
+            get_q_register(Vm, src2);
             for (int i = 0; i < 4; i++) {
               dst[i] = (dst[i] & src1[i]) | (~dst[i] & src2[i]);
             }
-            set_neon_register(Vd, dst);
+            set_q_register(Vd, dst);
           } else if (instr->Bits(21, 20) == 0 && instr->Bit(4) == 1) {
             if (instr->Bit(6) == 0) {
               // veor Dd, Dn, Dm
               uint64_t src1, src2;
               get_d_register(Vn, &src1);
               get_d_register(Vm, &src2);
               src1 ^= src2;
               set_d_register(Vd, &src1);
 
             } else {
               // veor Qd, Qn, Qm
               uint32_t src1[4], src2[4];
-              get_neon_register(Vn, src1);
-              get_neon_register(Vm, src2);
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
               for (int i = 0; i < 4; i++) src1[i] ^= src2[i];
-              set_neon_register(Vd, src1);
+              set_q_register(Vd, src1);
             }
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         case 0x2: {
           if (instr->Bit(4) == 1) {
             // vqsub.u<size> Qd, Qm, Qn.
             NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
@@ skipping 14 matching lines @@
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         case 0x3: {
           // vcge/vcgt.u<size> Qd, Qm, Qn.
           bool ge = instr->Bit(4) == 1;
           NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
           switch (size) {
-            case Neon8:
-              CompareGreater<uint8_t, kSimd128Size>(this, Vd, Vm, Vn, ge);
+            case Neon8: {
+              uint8_t src1[16], src2[16];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 16; i++) {
+                if (ge)
+                  src1[i] = src1[i] >= src2[i] ? 0xFFu : 0;
+                else
+                  src1[i] = src1[i] > src2[i] ? 0xFFu : 0;
+              }
+              set_q_register(Vd, src1);
               break;
-            case Neon16:
-              CompareGreater<uint16_t, kSimd128Size>(this, Vd, Vm, Vn, ge);
+            }
+            case Neon16: {
+              uint16_t src1[8], src2[8];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 8; i++) {
+                if (ge)
+                  src1[i] = src1[i] >= src2[i] ? 0xFFFFu : 0;
+                else
+                  src1[i] = src1[i] > src2[i] ? 0xFFFFu : 0;
+              }
+              set_q_register(Vd, src1);
               break;
-            case Neon32:
-              CompareGreater<uint32_t, kSimd128Size>(this, Vd, Vm, Vn, ge);
+            }
+            case Neon32: {
+              uint32_t src1[4], src2[4];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 4; i++) {
+                if (ge)
+                  src1[i] = src1[i] >= src2[i] ? 0xFFFFFFFFu : 0;
+                else
+                  src1[i] = src1[i] > src2[i] ? 0xFFFFFFFFu : 0;
+              }
+              set_q_register(Vd, src1);
               break;
+            }
             default:
               UNREACHABLE();
               break;
           }
           break;
         }
         case 0x6: {
           // vmin/vmax.u<size> Qd, Qm, Qn.
           NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
           bool min = instr->Bit(4) != 0;
           switch (size) {
-            case Neon8:
-              MinMax<uint8_t, kSimd128Size>(this, Vd, Vm, Vn, min);
+            case Neon8: {
+              uint8_t src1[16], src2[16];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 16; i++) {
+                src1[i] = MinMax(src1[i], src2[i], min);
+              }
+              set_q_register(Vd, src1);
               break;
-            case Neon16:
-              MinMax<uint16_t, kSimd128Size>(this, Vd, Vm, Vn, min);
+            }
+            case Neon16: {
+              uint16_t src1[8], src2[8];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 8; i++) {
+                src1[i] = MinMax(src1[i], src2[i], min);
+              }
+              set_q_register(Vd, src1);
               break;
-            case Neon32:
-              MinMax<uint32_t, kSimd128Size>(this, Vd, Vm, Vn, min);
+            }
+            case Neon32: {
+              uint32_t src1[4], src2[4];
+              get_q_register(Vn, src1);
+              get_q_register(Vm, src2);
+              for (int i = 0; i < 4; i++) {
+                src1[i] = MinMax(src1[i], src2[i], min);
+              }
+              set_q_register(Vd, src1);
               break;
+            }
             default:
               UNREACHABLE();
               break;
           }
           break;
         }
         case 0x8: {
           if (instr->Bit(4) == 0) {
             // vsub.size Qd, Qm, Qn.
             NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
             switch (size) {
-              case Neon8:
-                Sub<uint8_t, kSimd128Size>(this, Vd, Vm, Vn);
+              case Neon8: {
+                uint8_t src1[16], src2[16];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 16; i++) {
+                  src1[i] -= src2[i];
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon16:
-                Sub<uint16_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon16: {
+                uint16_t src1[8], src2[8];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 8; i++) {
+                  src1[i] -= src2[i];
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon32:
-                Sub<uint32_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon32: {
+                uint32_t src1[4], src2[4];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 4; i++) {
+                  src1[i] -= src2[i];
+                }
+                set_q_register(Vd, src1);
                 break;
+              }
               default:
                 UNREACHABLE();
                 break;
             }
           } else {
             // vceq.size Qd, Qm, Qn.
             NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
             switch (size) {
-              case Neon8:
-                CompareEqual<uint8_t, kSimd128Size>(this, Vd, Vm, Vn);
+              case Neon8: {
+                uint8_t src1[16], src2[16];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 16; i++) {
+                  src1[i] = (src1[i] == src2[i]) ? 0xFFu : 0;
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon16:
-                CompareEqual<uint16_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon16: {
+                uint16_t src1[8], src2[8];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 8; i++) {
+                  src1[i] = (src1[i] == src2[i]) ? 0xFFFFu : 0;
+                }
+                set_q_register(Vd, src1);
                 break;
-              case Neon32:
-                CompareEqual<uint32_t, kSimd128Size>(this, Vd, Vm, Vn);
+              }
+              case Neon32: {
+                uint32_t src1[4], src2[4];
+                get_q_register(Vn, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 4; i++) {
+                  src1[i] = (src1[i] == src2[i]) ? 0xFFFFFFFFu : 0;
+                }
+                set_q_register(Vd, src1);
                 break;
+              }
               default:
                 UNREACHABLE();
                 break;
             }
           }
           break;
         }
         case 0xa: {
           // vpmin/vpmax.u<size> Dd, Dm, Dn.
           NeonSize size = static_cast<NeonSize>(instr->Bits(21, 20));
           bool min = instr->Bit(4) != 0;
           switch (size) {
-            case Neon8:
-              PairwiseMinMax<uint8_t>(this, Vd, Vm, Vn, min);
+            case Neon8: {
+              uint8_t dst[8], src1[8], src2[8];
+              get_d_register(Vn, src1);
+              get_d_register(Vm, src2);
+              for (int i = 0; i < 4; i++) {
+                dst[i + 0] = MinMax(src1[i * 2], src1[i * 2 + 1], min);
+                dst[i + 4] = MinMax(src2[i * 2], src2[i * 2 + 1], min);
+              }
+              set_d_register(Vd, dst);
               break;
-            case Neon16:
-              PairwiseMinMax<uint16_t>(this, Vd, Vm, Vn, min);
+            }
+            case Neon16: {
+              uint16_t dst[4], src1[4], src2[4];
+              get_d_register(Vn, src1);
+              get_d_register(Vm, src2);
+              for (int i = 0; i < 2; i++) {
+                dst[i + 0] = MinMax(src1[i * 2], src1[i * 2 + 1], min);
+                dst[i + 2] = MinMax(src2[i * 2], src2[i * 2 + 1], min);
+              }
+              set_d_register(Vd, dst);
               break;
-            case Neon32:
-              PairwiseMinMax<uint32_t>(this, Vd, Vm, Vn, min);
+            }
+            case Neon32: {
+              uint32_t dst[2], src1[2], src2[2];
+              get_d_register(Vn, src1);
+              get_d_register(Vm, src2);
+              dst[0] = MinMax(src1[0], src1[1], min);
+              dst[1] = MinMax(src2[0], src2[1], min);
+              set_d_register(Vd, dst);
               break;
+            }
             default:
               UNREACHABLE();
               break;
           }
           break;
         }
         case 0xd: {
           if (instr->Bit(21) == 0 && instr->Bit(6) == 1 && instr->Bit(4) == 1) {
             // vmul.f32 Qd, Qn, Qm
             float src1[4], src2[4];
-            get_neon_register(Vn, src1);
-            get_neon_register(Vm, src2);
+            get_q_register(Vn, src1);
+            get_q_register(Vm, src2);
             for (int i = 0; i < 4; i++) {
               src1[i] = src1[i] * src2[i];
             }
-            set_neon_register(Vd, src1);
+            set_q_register(Vd, src1);
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         case 0xe: {
           if (instr->Bit(20) == 0 && instr->Bit(4) == 0) {
             // vcge/vcgt.f32 Qd, Qm, Qn
             bool ge = instr->Bit(21) == 0;
             float src1[4], src2[4];
-            get_neon_register(Vn, src1);
-            get_neon_register(Vm, src2);
+            get_q_register(Vn, src1);
+            get_q_register(Vm, src2);
             uint32_t dst[4];
             for (int i = 0; i < 4; i++) {
               if (ge) {
                 dst[i] = src1[i] >= src2[i] ? 0xFFFFFFFFu : 0;
               } else {
                 dst[i] = src1[i] > src2[i] ? 0xFFFFFFFFu : 0;
               }
             }
-            set_neon_register(Vd, dst);
+            set_q_register(Vd, dst);
           } else {
             UNIMPLEMENTED();
           }
           break;
         }
         default:
           UNREACHABLE();
           break;
       }
       break;
@@ skipping 20 matching lines @@
             UNIMPLEMENTED();
             break;
         }
       } else if (instr->Opc1Value() == 7 && instr->Bit(4) == 0) {
         if (instr->Bits(19, 16) == 0xB && instr->Bits(11, 9) == 0x3 &&
             instr->Bit(6) == 1) {
           // vcvt.<Td>.<Tm> Qd, Qm.
           int Vd = instr->VFPDRegValue(kSimd128Precision);
           int Vm = instr->VFPMRegValue(kSimd128Precision);
           uint32_t q_data[4];
-          get_neon_register(Vm, q_data);
+          get_q_register(Vm, q_data);
           int op = instr->Bits(8, 7);
           for (int i = 0; i < 4; i++) {
             switch (op) {
               case 0:
                 // f32 <- s32, round towards nearest.
                 q_data[i] = bit_cast<uint32_t>(std::round(
                     static_cast<float>(bit_cast<int32_t>(q_data[i]))));
                 break;
               case 1:
                 // f32 <- u32, round towards nearest.
                 q_data[i] = bit_cast<uint32_t>(
                     std::round(static_cast<float>(q_data[i])));
                 break;
               case 2:
                 // s32 <- f32, round to zero.
                 q_data[i] = static_cast<uint32_t>(
                     ConvertDoubleToInt(bit_cast<float>(q_data[i]), false, RZ));
                 break;
               case 3:
                 // u32 <- f32, round to zero.
                 q_data[i] = static_cast<uint32_t>(
                     ConvertDoubleToInt(bit_cast<float>(q_data[i]), true, RZ));
                 break;
             }
           }
-          set_neon_register(Vd, q_data);
+          set_q_register(Vd, q_data);
         } else if (instr->Bits(17, 16) == 0x2 && instr->Bits(11, 7) == 0) {
           if (instr->Bit(6) == 0) {
             // vswp Dd, Dm.
             uint64_t dval, mval;
             int vd = instr->VFPDRegValue(kDoublePrecision);
             int vm = instr->VFPMRegValue(kDoublePrecision);
             get_d_register(vd, &dval);
             get_d_register(vm, &mval);
             set_d_register(vm, &dval);
             set_d_register(vd, &mval);
           } else {
             // vswp Qd, Qm.
             uint32_t dval[4], mval[4];
             int vd = instr->VFPDRegValue(kSimd128Precision);
             int vm = instr->VFPMRegValue(kSimd128Precision);
-            get_neon_register(vd, dval);
-            get_neon_register(vm, mval);
-            set_neon_register(vm, dval);
-            set_neon_register(vd, mval);
+            get_q_register(vd, dval);
+            get_q_register(vm, mval);
+            set_q_register(vm, dval);
+            set_q_register(vd, mval);
           }
         } else if (instr->Bits(11, 7) == 0x18) {
           // vdup.32 Qd, Sm.
           int vd = instr->VFPDRegValue(kSimd128Precision);
           int vm = instr->VFPMRegValue(kDoublePrecision);
           int index = instr->Bit(19);
           uint32_t s_data = get_s_register(vm * 2 + index);
           uint32_t q_data[4];
           for (int i = 0; i < 4; i++) q_data[i] = s_data;
-          set_neon_register(vd, q_data);
+          set_q_register(vd, q_data);
         } else if (instr->Bits(19, 16) == 0 && instr->Bits(11, 6) == 0x17) {
           // vmvn Qd, Qm.
           int vd = instr->VFPDRegValue(kSimd128Precision);
           int vm = instr->VFPMRegValue(kSimd128Precision);
           uint32_t q_data[4];
-          get_neon_register(vm, q_data);
+          get_q_register(vm, q_data);
           for (int i = 0; i < 4; i++) q_data[i] = ~q_data[i];
-          set_neon_register(vd, q_data);
+          set_q_register(vd, q_data);
         } else if (instr->Bits(11, 10) == 0x2) {
           // vtb[l,x] Dd, <list>, Dm.
           int vd = instr->VFPDRegValue(kDoublePrecision);
           int vn = instr->VFPNRegValue(kDoublePrecision);
           int vm = instr->VFPMRegValue(kDoublePrecision);
           int table_len = (instr->Bits(9, 8) + 1) * kDoubleSize;
           bool vtbx = instr->Bit(6) != 0;  // vtbl / vtbx
           uint64_t destination = 0, indices = 0, result = 0;
           get_d_register(vd, &destination);
           get_d_register(vm, &indices);
           for (int i = 0; i < kDoubleSize; i++) {
             int shift = i * kBitsPerByte;
             int index = (indices >> shift) & 0xFF;
             if (index < table_len) {
               uint64_t table;
               get_d_register(vn + index / kDoubleSize, &table);
               result |=
                   ((table >> ((index % kDoubleSize) * kBitsPerByte)) & 0xFF)
                   << shift;
             } else if (vtbx) {
               result |= destination & (0xFFull << shift);
             }
           }
           set_d_register(vd, &result);
-        } else if (instr->Bits(17, 16) == 0x2 && instr->Bits(11, 8) == 0x1) {
+        } else if (instr->Bits(17, 16) == 0x2 && instr->Bits(11, 8) == 0x1 &&
+                   instr->Bit(6) == 1) {
           NeonSize size = static_cast<NeonSize>(instr->Bits(19, 18));
-          if (instr->Bit(6) == 0) {
-            int Vd = instr->VFPDRegValue(kDoublePrecision);
-            int Vm = instr->VFPMRegValue(kDoublePrecision);
-            if (instr->Bit(7) == 1) {
-              // vzip.<size> Dd, Dm.
-              switch (size) {
-                case Neon8:
-                  Zip<uint8_t, kDoubleSize>(this, Vd, Vm);
-                  break;
-                case Neon16:
-                  Zip<uint16_t, kDoubleSize>(this, Vd, Vm);
-                  break;
-                case Neon32:
-                  Zip<uint32_t, kDoubleSize>(this, Vd, Vm);
-                  break;
-                default:
-                  UNREACHABLE();
-                  break;
+          int Vd = instr->VFPDRegValue(kSimd128Precision);
+          int Vm = instr->VFPMRegValue(kSimd128Precision);
+          if (instr->Bit(7) == 1) {
+            // vzip.<size> Qd, Qm.
+            switch (size) {
+              case Neon8: {
+                uint8_t src1[16], src2[16], dst1[16], dst2[16];
+                get_q_register(Vd, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 8; i++) {
+                  dst1[i * 2] = src1[i];
+                  dst1[i * 2 + 1] = src2[i];
+                  dst2[i * 2] = src1[i + 8];
+                  dst2[i * 2 + 1] = src2[i + 8];
+                }
+                set_q_register(Vd, dst1);
+                set_q_register(Vm, dst2);
+                break;
               }
-            } else {
-              // vuzp.<size> Dd, Dm.
-              switch (size) {
-                case Neon8:
-                  Unzip<uint8_t, kDoubleSize>(this, Vd, Vm);
-                  break;
-                case Neon16:
-                  Unzip<uint16_t, kDoubleSize>(this, Vd, Vm);
-                  break;
-                case Neon32:
-                  Unzip<uint32_t, kDoubleSize>(this, Vd, Vm);
-                  break;
-                default:
-                  UNREACHABLE();
-                  break;
+              case Neon16: {
+                uint16_t src1[8], src2[8], dst1[8], dst2[8];
+                get_q_register(Vd, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 4; i++) {
+                  dst1[i * 2] = src1[i];
+                  dst1[i * 2 + 1] = src2[i];
+                  dst2[i * 2] = src1[i + 4];
+                  dst2[i * 2 + 1] = src2[i + 4];
+                }
+                set_q_register(Vd, dst1);
+                set_q_register(Vm, dst2);
+                break;
               }
+              case Neon32: {
+                uint32_t src1[4], src2[4], dst1[4], dst2[4];
+                get_q_register(Vd, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 2; i++) {
+                  dst1[i * 2] = src1[i];
+                  dst1[i * 2 + 1] = src2[i];
+                  dst2[i * 2] = src1[i + 2];
+                  dst2[i * 2 + 1] = src2[i + 2];
+                }
+                set_q_register(Vd, dst1);
+                set_q_register(Vm, dst2);
+                break;
+              }
+              default:
+                UNREACHABLE();
+                break;
             }
           } else {
-            int Vd = instr->VFPDRegValue(kSimd128Precision);
-            int Vm = instr->VFPMRegValue(kSimd128Precision);
-            if (instr->Bit(7) == 1) {
-              // vzip.<size> Qd, Qm.
-              switch (size) {
-                case Neon8:
-                  Zip<uint8_t, kSimd128Size>(this, Vd, Vm);
-                  break;
-                case Neon16:
-                  Zip<uint16_t, kSimd128Size>(this, Vd, Vm);
-                  break;
-                case Neon32:
-                  Zip<uint32_t, kSimd128Size>(this, Vd, Vm);
-                  break;
-                default:
-                  UNREACHABLE();
-                  break;
+            // vuzp.<size> Qd, Qm.
+            switch (size) {
+              case Neon8: {
+                uint8_t src1[16], src2[16], dst1[16], dst2[16];
+                get_q_register(Vd, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 8; i++) {
+                  dst1[i] = src1[i * 2];
+                  dst1[i + 8] = src2[i * 2];
+                  dst2[i] = src1[i * 2 + 1];
+                  dst2[i + 8] = src2[i * 2 + 1];
+                }
+                set_q_register(Vd, dst1);
+                set_q_register(Vm, dst2);
+                break;
               }
-            } else {
-              // vuzp.<size> Qd, Qm.
-              switch (size) {
-                case Neon8:
-                  Unzip<uint8_t, kSimd128Size>(this, Vd, Vm);
-                  break;
-                case Neon16:
-                  Unzip<uint16_t, kSimd128Size>(this, Vd, Vm);
-                  break;
-                case Neon32:
-                  Unzip<uint32_t, kSimd128Size>(this, Vd, Vm);
-                  break;
-                default:
-                  UNREACHABLE();
-                  break;
+              case Neon16: {
+                uint16_t src1[8], src2[8], dst1[8], dst2[8];
+                get_q_register(Vd, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 4; i++) {
+                  dst1[i] = src1[i * 2];
+                  dst1[i + 4] = src2[i * 2];
+                  dst2[i] = src1[i * 2 + 1];
+                  dst2[i + 4] = src2[i * 2 + 1];
+                }
+                set_q_register(Vd, dst1);
+                set_q_register(Vm, dst2);
+                break;
               }
+              case Neon32: {
+                uint32_t src1[4], src2[4], dst1[4], dst2[4];
+                get_q_register(Vd, src1);
+                get_q_register(Vm, src2);
+                for (int i = 0; i < 2; i++) {
+                  dst1[i] = src1[i * 2];
+                  dst1[i + 2] = src2[i * 2];
+                  dst2[i] = src1[i * 2 + 1];
+                  dst2[i + 2] = src2[i * 2 + 1];
+                }
+                set_q_register(Vd, dst1);
+                set_q_register(Vm, dst2);
+                break;
+              }
+              default:
+                UNREACHABLE();
+                break;
             }
           }
         } else if (instr->Bits(17, 16) == 0 && instr->Bits(11, 9) == 0) {
           // vrev<op>.size Qd, Qm
           int Vd = instr->VFPDRegValue(kSimd128Precision);
           int Vm = instr->VFPMRegValue(kSimd128Precision);
           NeonSize size = static_cast<NeonSize>(instr->Bits(19, 18));
           NeonSize op = static_cast<NeonSize>(static_cast<int>(Neon64) -
                                               instr->Bits(8, 7));
           switch (op) {
             case Neon16: {
               DCHECK_EQ(Neon8, size);
               uint8_t src[16];
-              get_neon_register(Vm, src);
+              get_q_register(Vm, src);
               for (int i = 0; i < 16; i += 2) {
                 std::swap(src[i], src[i + 1]);
               }
-              set_neon_register(Vd, src);
+              set_q_register(Vd, src);
               break;
             }
             case Neon32: {
               switch (size) {
                 case Neon16: {
                   uint16_t src[8];
-                  get_neon_register(Vm, src);
+                  get_q_register(Vm, src);
                   for (int i = 0; i < 8; i += 2) {
                     std::swap(src[i], src[i + 1]);
                   }
-                  set_neon_register(Vd, src);
+                  set_q_register(Vd, src);
                   break;
                 }
                 case Neon8: {
                   uint8_t src[16];
-                  get_neon_register(Vm, src);
+                  get_q_register(Vm, src);
                   for (int i = 0; i < 4; i++) {
                     std::swap(src[i * 4], src[i * 4 + 3]);
                     std::swap(src[i * 4 + 1], src[i * 4 + 2]);
                   }
-                  set_neon_register(Vd, src);
+                  set_q_register(Vd, src);
                   break;
                 }
                 default:
                   UNREACHABLE();
                   break;
               }
               break;
             }
             case Neon64: {
               switch (size) {
                 case Neon32: {
                   uint32_t src[4];
-                  get_neon_register(Vm, src);
+                  get_q_register(Vm, src);
                   std::swap(src[0], src[1]);
                   std::swap(src[2], src[3]);
-                  set_neon_register(Vd, src);
+                  set_q_register(Vd, src);
                   break;
                 }
                 case Neon16: {
                   uint16_t src[8];
-                  get_neon_register(Vm, src);
+                  get_q_register(Vm, src);
                   for (int i = 0; i < 4; i++) {
                     std::swap(src[i * 4], src[i * 4 + 3]);
                     std::swap(src[i * 4 + 1], src[i * 4 + 2]);
                   }
-                  set_neon_register(Vd, src);
+                  set_q_register(Vd, src);
                   break;
                 }
                 case Neon8: {
                   uint8_t src[16];
-                  get_neon_register(Vm, src);
+                  get_q_register(Vm, src);
                   for (int i = 0; i < 4; i++) {
                     std::swap(src[i], src[7 - i]);
                     std::swap(src[i + 8], src[15 - i]);
                   }
-                  set_neon_register(Vd, src);
+                  set_q_register(Vd, src);
                   break;
                 }
                 default:
                   UNREACHABLE();
                   break;
               }
               break;
             }
             default:
               UNREACHABLE();
               break;
           }
-        } else if (instr->Bits(17, 16) == 0x2 && instr->Bits(11, 7) == 0x1) {
+        } else if (instr->Bits(17, 16) == 0x2 && instr->Bits(11, 6) == 0x3) {
+          int Vd = instr->VFPDRegValue(kSimd128Precision);
+          int Vm = instr->VFPMRegValue(kSimd128Precision);
           NeonSize size = static_cast<NeonSize>(instr->Bits(19, 18));
-          if (instr->Bit(6) == 0) {
-            int Vd = instr->VFPDRegValue(kDoublePrecision);
-            int Vm = instr->VFPMRegValue(kDoublePrecision);
-            // vtrn.<size> Dd, Dm.
-            switch (size) {
-              case Neon8:
-                Transpose<uint8_t, kDoubleSize>(this, Vd, Vm);
-                break;
-              case Neon16:
-                Transpose<uint16_t, kDoubleSize>(this, Vd, Vm);
-                break;
-              case Neon32:
-                Transpose<uint32_t, kDoubleSize>(this, Vd, Vm);
-                break;
-              default:
-                UNREACHABLE();
-                break;
+          // vtrn.<size> Qd, Qm.
+          switch (size) {
+            case Neon8: {
+              uint8_t src[16], dst[16];
+              get_q_register(Vd, dst);
+              get_q_register(Vm, src);
+              for (int i = 0; i < 8; i++) {
+                std::swap(dst[2 * i + 1], src[2 * i]);
+              }
+              set_q_register(Vd, dst);
+              set_q_register(Vm, src);
+              break;
             }
-          } else {
-            int Vd = instr->VFPDRegValue(kSimd128Precision);
-            int Vm = instr->VFPMRegValue(kSimd128Precision);
-            // vtrn.<size> Qd, Qm.
-            switch (size) {
-              case Neon8:
-                Transpose<uint8_t, kSimd128Size>(this, Vd, Vm);
-                break;
-              case Neon16:
-                Transpose<uint16_t, kSimd128Size>(this, Vd, Vm);
-                break;
-              case Neon32:
-                Transpose<uint32_t, kSimd128Size>(this, Vd, Vm);
-                break;
-              default:
-                UNREACHABLE();
-                break;
+            case Neon16: {
+              uint16_t src[8], dst[8];
+              get_q_register(Vd, dst);
+              get_q_register(Vm, src);
+              for (int i = 0; i < 4; i++) {
+                std::swap(dst[2 * i + 1], src[2 * i]);
+              }
+              set_q_register(Vd, dst);
+              set_q_register(Vm, src);
+              break;
             }
+            case Neon32: {
+              uint32_t src[4], dst[4];
+              get_q_register(Vd, dst);
+              get_q_register(Vm, src);
+              for (int i = 0; i < 2; i++) {
+                std::swap(dst[2 * i + 1], src[2 * i]);
+              }
+              set_q_register(Vd, dst);
+              set_q_register(Vm, src);
+              break;
+            }
+            default:
+              UNREACHABLE();
+              break;
           }
         } else if (instr->Bits(17, 16) == 0x1 && instr->Bit(11) == 0) {
           int Vd = instr->VFPDRegValue(kSimd128Precision);
           int Vm = instr->VFPMRegValue(kSimd128Precision);
           NeonSize size = static_cast<NeonSize>(instr->Bits(19, 18));
           if (instr->Bits(9, 6) == 0xd) {
             // vabs<type>.<size> Qd, Qm
             if (instr->Bit(10) != 0) {
               // floating point (clear sign bits)
               uint32_t src[4];
-              get_neon_register(Vm, src);
+              get_q_register(Vm, src);
               for (int i = 0; i < 4; i++) {
                 src[i] &= ~0x80000000;
               }
-              set_neon_register(Vd, src);
+              set_q_register(Vd, src);
             } else {
               // signed integer
               switch (size) {
-                case Neon8:
-                  Abs<int8_t, kSimd128Size>(this, Vd, Vm);
+                case Neon8: {
+                  int8_t src[16];
+                  get_q_register(Vm, src);
+                  for (int i = 0; i < 16; i++) {
+                    src[i] = std::abs(src[i]);
+                  }
+                  set_q_register(Vd, src);
                   break;
-                case Neon16:
-                  Abs<int16_t, kSimd128Size>(this, Vd, Vm);
+                }
+                case Neon16: {
+                  int16_t src[8];
+                  get_q_register(Vm, src);
+                  for (int i = 0; i < 8; i++) {
+                    src[i] = std::abs(src[i]);
+                  }
+                  set_q_register(Vd, src);
                   break;
-                case Neon32:
-                  Abs<int32_t, kSimd128Size>(this, Vd, Vm);
+                }
+                case Neon32: {
+                  int32_t src[4];
+                  get_q_register(Vm, src);
+                  for (int i = 0; i < 4; i++) {
+                    src[i] = std::abs(src[i]);
+                  }
+                  set_q_register(Vd, src);
                   break;
+                }
                 default:
                   UNIMPLEMENTED();
                   break;
               }
             }
           } else if (instr->Bits(9, 6) == 0xf) {
             // vneg<type>.<size> Qd, Qm (signed integer)
             if (instr->Bit(10) != 0) {
               // floating point (toggle sign bits)
               uint32_t src[4];
-              get_neon_register(Vm, src);
+              get_q_register(Vm, src);
               for (int i = 0; i < 4; i++) {
                 src[i] ^= 0x80000000;
               }
-              set_neon_register(Vd, src);
+              set_q_register(Vd, src);
             } else {
               // signed integer
               switch (size) {
-                case Neon8:
-                  Neg<int8_t, kSimd128Size>(this, Vd, Vm);
+                case Neon8: {
+                  int8_t src[16];
+                  get_q_register(Vm, src);
+                  for (int i = 0; i < 16; i++) {
+                    src[i] = -src[i];
+                  }
+                  set_q_register(Vd, src);
                   break;
+                }
                 case Neon16:
-                  Neg<int16_t, kSimd128Size>(this, Vd, Vm);
+                  int16_t src[8];
+                  get_q_register(Vm, src);
+                  for (int i = 0; i < 8; i++) {
+                    src[i] = -src[i];
+                  }
+                  set_q_register(Vd, src);
                   break;
-                case Neon32:
-                  Neg<int32_t, kSimd128Size>(this, Vd, Vm);
+                case Neon32: {
+                  int32_t src[4];
+                  get_q_register(Vm, src);
+                  for (int i = 0; i < 4; i++) {
+                    src[i] = -src[i];
+                  }
+                  set_q_register(Vd, src);
                   break;
+                }
                 default:
                   UNIMPLEMENTED();
                   break;
               }
             }
           } else {
             UNIMPLEMENTED();
           }
         } else if (instr->Bits(19, 18) == 0x2 && instr->Bits(11, 8) == 0x5) {
           // vrecpe/vrsqrte.f32 Qd, Qm.
           int Vd = instr->VFPDRegValue(kSimd128Precision);
           int Vm = instr->VFPMRegValue(kSimd128Precision);
           uint32_t src[4];
-          get_neon_register(Vm, src);
+          get_q_register(Vm, src);
           if (instr->Bit(7) == 0) {
             for (int i = 0; i < 4; i++) {
               float denom = bit_cast<float>(src[i]);
               div_zero_vfp_flag_ = (denom == 0);
               float result = 1.0f / denom;
               result = canonicalizeNaN(result);
               src[i] = bit_cast<uint32_t>(result);
             }
           } else {
             lazily_initialize_fast_sqrt(isolate_);
             for (int i = 0; i < 4; i++) {
               float radicand = bit_cast<float>(src[i]);
               float result = 1.0f / fast_sqrt(radicand, isolate_);
               result = canonicalizeNaN(result);
               src[i] = bit_cast<uint32_t>(result);
             }
           }
-          set_neon_register(Vd, src);
+          set_q_register(Vd, src);
         } else if (instr->Bits(17, 16) == 0x2 && instr->Bits(11, 8) == 0x2 &&
                    instr->Bits(7, 6) != 0) {
           // vqmovn.<type><size> Dd, Qm.
           int Vd = instr->VFPDRegValue(kDoublePrecision);
           int Vm = instr->VFPMRegValue(kSimd128Precision);
           NeonSize size = static_cast<NeonSize>(instr->Bits(19, 18));
           bool is_unsigned = instr->Bit(6) != 0;
           switch (size) {
             case Neon8: {
               if (is_unsigned) {
@@ skipping 27 matching lines @@
           UNIMPLEMENTED();
         }
       } else if (instr->Bits(11, 7) == 0 && instr->Bit(4) == 1) {
         // vshr.u<size> Qd, Qm, shift
         int size = base::bits::RoundDownToPowerOfTwo32(instr->Bits(21, 16));
         int shift = 2 * size - instr->Bits(21, 16);
         int Vd = instr->VFPDRegValue(kSimd128Precision);
         int Vm = instr->VFPMRegValue(kSimd128Precision);
         NeonSize ns = static_cast<NeonSize>(size / 16);
         switch (ns) {
-          case Neon8:
-            ShiftRight<uint8_t, kSimd128Size>(this, Vd, Vm, shift);
+          case Neon8: {
+            uint8_t src[16];
+            get_q_register(Vm, src);
+            for (int i = 0; i < 16; i++) {
+              src[i] >>= shift;
+            }
+            set_q_register(Vd, src);
             break;
-          case Neon16:
-            ShiftRight<uint16_t, kSimd128Size>(this, Vd, Vm, shift);
+          }
+          case Neon16: {
+            uint16_t src[8];
+            get_q_register(Vm, src);
+            for (int i = 0; i < 8; i++) {
+              src[i] >>= shift;
+            }
+            set_q_register(Vd, src);
             break;
-          case Neon32:
-            ShiftRight<uint32_t, kSimd128Size>(this, Vd, Vm, shift);
+          }
+          case Neon32: {
+            uint32_t src[4];
+            get_q_register(Vm, src);
+            for (int i = 0; i < 4; i++) {
+              src[i] >>= shift;
+            }
+            set_q_register(Vd, src);
             break;
+          }
           default:
             UNREACHABLE();
             break;
         }
       } else {
         UNIMPLEMENTED();
       }
       break;
     case 8:
       if (instr->Bits(21, 20) == 0) {
@@ skipping 701 matching lines @@
   processor->prev_ = nullptr;
   processor->next_ = nullptr;
 }
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // USE_SIMULATOR
 
 #endif  // V8_TARGET_ARCH_ARM