[WASM SIMD] Implement horizontal add for float and integer types.

test/cctest/test-assembler-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1279 matching lines @@
     uint32_t vmovl_s8[4], vmovl_u16[4], vmovl_s32[4];
     uint32_t vqmovn_s8[2], vqmovn_u16[2], vqmovn_s32[2];
     int32_t vcvt_s32_f32[4];
     uint32_t vcvt_u32_f32[4];
     float vcvt_f32_s32[4], vcvt_f32_u32[4];
     uint32_t vdup8[4], vdup16[4], vdup32[4];
     float vabsf[4], vnegf[4];
     uint32_t vabs_s8[4], vabs_s16[4], vabs_s32[4];
     uint32_t vneg_s8[4], vneg_s16[4], vneg_s32[4];
     uint32_t veor[4], vand[4], vorr[4];
-    float vdupf[4], vaddf[4], vsubf[4], vmulf[4];
+    float vdupf[4], vaddf[4], vpaddf[2], vsubf[4], vmulf[4];
     uint32_t vmin_s8[4], vmin_u16[4], vmin_s32[4];
     uint32_t vmax_s8[4], vmax_u16[4], vmax_s32[4];
+    uint32_t vpadd_i8[2], vpadd_i16[2], vpadd_i32[2];
     uint32_t vpmin_s8[2], vpmin_u16[2], vpmin_s32[2];
     uint32_t vpmax_s8[2], vpmax_u16[2], vpmax_s32[2];
     uint32_t vadd8[4], vadd16[4], vadd32[4];
     uint32_t vqadd_s8[4], vqadd_u16[4], vqadd_s32[4];
     uint32_t vsub8[4], vsub16[4], vsub32[4];
     uint32_t vqsub_u8[4], vqsub_s16[4], vqsub_u32[4];
     uint32_t vmul8[4], vmul16[4], vmul32[4];
     uint32_t vshl8[4], vshl16[4], vshl32[5];
     uint32_t vshr_s8[4], vshr_u16[4], vshr_s32[5];
     uint32_t vceq[4], vceqf[4], vcgef[4], vcgtf[4];
@@ skipping 225 matching lines @@
     __ vmax(q1, q1, q0);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vmaxf))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     // vadd (float).
     __ vmov(s4, 1.0);
     __ vdup(q0, s4);
     __ vdup(q1, s4);
     __ vadd(q1, q1, q0);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vaddf))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
+    // vpadd (float).
+    __ vmov(s0, 1.0);
+    __ vmov(s1, 2.0);
+    __ vmov(s2, 3.0);
+    __ vmov(s3, 4.0);
+    __ vpadd(d2, d0, d1);
+    __ vstr(d2, r0, offsetof(T, vpaddf));
     // vsub (float).
     __ vmov(s4, 2.0);
     __ vdup(q0, s4);
     __ vmov(s4, 1.0);
     __ vdup(q1, s4);
     __ vsub(q1, q1, q0);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vsubf))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     // vmul (float).
     __ vmov(s4, 2.0);
@@ skipping 72 matching lines @@
     __ mov(r4, Operand(0xff));
     __ vdup(Neon32, q0, r4);
     __ vdup(Neon8, q1, r4);
     __ vmin(NeonS32, q2, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vmin_s32))));
     __ vst1(Neon8, NeonListOperand(q2), NeonMemOperand(r4));
     __ vmax(NeonS32, q2, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vmax_s32))));
     __ vst1(Neon8, NeonListOperand(q2), NeonMemOperand(r4));
 
+    // vpadd integer.
+    __ mov(r4, Operand(0x03));
+    __ vdup(Neon16, q0, r4);
+    __ vdup(Neon8, q1, r4);
+    __ vpadd(Neon8, d0, d0, d2);
+    __ vstr(d0, r0, offsetof(T, vpadd_i8));
+    __ vpadd(Neon16, d0, d0, d2);
+    __ vstr(d0, r0, offsetof(T, vpadd_i16));
+    __ vpadd(Neon32, d0, d0, d2);
+    __ vstr(d0, r0, offsetof(T, vpadd_i32));
+
     // vpmin/vpmax integer.
     __ mov(r4, Operand(0x03));
     __ vdup(Neon16, q0, r4);
     __ vdup(Neon8, q1, r4);
     __ vpmin(NeonS8, d4, d0, d2);
     __ vstr(d4, r0, offsetof(T, vpmin_s8));
     __ vpmax(NeonS8, d4, d0, d2);
     __ vstr(d4, r0, offsetof(T, vpmax_s8));
     __ mov(r4, Operand(0xffff));
     __ vdup(Neon32, q0, r4);
@@ skipping 458 matching lines @@
     CHECK_EQ_32X4(vabs_s16, 0x7f7f7f7fu, 0x01010101u, 0x00010001u, 0x7f807f80u);
     CHECK_EQ_32X4(vabs_s32, 0x7f7f7f7fu, 0x01010101u, 0x00000001u, 0x7f7f7f80u);
     CHECK_EQ_32X4(vneg_s8, 0x81818181u, 0xffffffffu, 0x01010101u, 0x80808080u);
     CHECK_EQ_32X4(vneg_s16, 0x80818081u, 0xfefffeffu, 0x00010001u, 0x7f807f80u);
     CHECK_EQ_32X4(vneg_s32, 0x80808081u, 0xfefefeffu, 0x00000001u, 0x7f7f7f80u);
 
     CHECK_EQ_SPLAT(veor, 0x00ff00ffu);
     CHECK_EQ_SPLAT(vand, 0x00fe00feu);
     CHECK_EQ_SPLAT(vorr, 0x00ff00ffu);
     CHECK_EQ_SPLAT(vaddf, 2.0);
+    CHECK_EQ_32X2(vpaddf, 3.0, 7.0);
     CHECK_EQ_SPLAT(vminf, 1.0);
     CHECK_EQ_SPLAT(vmaxf, 2.0);
     CHECK_EQ_SPLAT(vsubf, -1.0);
     CHECK_EQ_SPLAT(vmulf, 4.0);
     CHECK_ESTIMATE_SPLAT(vrecpe, 0.5f, 0.1f);  // 1 / 2
     CHECK_EQ_SPLAT(vrecps, -1.0f);   // 2 - (2 * 1.5)
     CHECK_ESTIMATE_SPLAT(vrsqrte, 0.5f, 0.1f);  // 1 / sqrt(4)
     CHECK_EQ_SPLAT(vrsqrts, -1.0f);  // (3 - (2 * 2.5)) / 2
     CHECK_EQ_SPLAT(vceqf, 0xffffffffu);
     // [0] >= [-1, 1, -0, 0]
     CHECK_EQ_32X4(vcgef, 0u, 0xffffffffu, 0xffffffffu, 0xffffffffu);
     CHECK_EQ_32X4(vcgtf, 0u, 0xffffffffu, 0u, 0u);
     // [0, 3, 0, 3, ...] and [3, 3, 3, 3, ...]
     CHECK_EQ_SPLAT(vmin_s8, 0x00030003u);
     CHECK_EQ_SPLAT(vmax_s8, 0x03030303u);
     // [0x00ff, 0x00ff, ...] and [0xffff, 0xffff, ...]
     CHECK_EQ_SPLAT(vmin_u16, 0x00ff00ffu);
     CHECK_EQ_SPLAT(vmax_u16, 0xffffffffu);
     // [0x000000ff, 0x000000ff, ...] and [0xffffffff, 0xffffffff, ...]
     CHECK_EQ_SPLAT(vmin_s32, 0xffffffffu);
     CHECK_EQ_SPLAT(vmax_s32, 0xffu);
     // [0, 3, 0, 3, ...] and [3, 3, 3, 3, ...]
+    CHECK_EQ_32X2(vpadd_i8, 0x03030303u, 0x06060606u);
+    CHECK_EQ_32X2(vpadd_i16, 0x0c0c0606u, 0x06060606u);
+    CHECK_EQ_32X2(vpadd_i32, 0x12120c0cu, 0x06060606u);
     CHECK_EQ_32X2(vpmin_s8, 0x00000000u, 0x03030303u);
     CHECK_EQ_32X2(vpmax_s8, 0x03030303u, 0x03030303u);
     // [0, ffff, 0, ffff] and [ffff, ffff]
     CHECK_EQ_32X2(vpmin_u16, 0x00000000u, 0xffffffffu);
     CHECK_EQ_32X2(vpmax_u16, 0xffffffffu, 0xffffffffu);
     // [0x000000ff, 0x00000000u] and [0xffffffff, 0xffffffff, ...]
     CHECK_EQ_32X2(vpmin_s32, 0x00u, 0xffffffffu);
     CHECK_EQ_32X2(vpmax_s32, 0xffu, 0xffffffffu);
     CHECK_EQ_SPLAT(vadd8, 0x03030303u);
     CHECK_EQ_SPLAT(vadd16, 0x00030003u);
@@ skipping 1759 matching lines @@
   HandleScope scope(isolate);
 
   Assembler assm(isolate, NULL, 0);
   __ mov(r0, Operand(isolate->factory()->infinity_value()));
   __ BlockConstPoolFor(1019);
   for (int i = 0; i < 1019; ++i) __ nop();
   __ vldr(d0, MemOperand(r0, 0));
 }
 
 #undef __