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Side by Side Diff: src/wasm/wasm-opcodes.h

Issue 2804883008: [WASM SIMD] Implement horizontal add for float and integer types. (Closed)
Patch Set: Rebase, reformat. Created 3 years, 8 months ago
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1 // Copyright 2015 the V8 project authors. All rights reserved. 1 // Copyright 2015 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_WASM_OPCODES_H_ 5 #ifndef V8_WASM_OPCODES_H_
6 #define V8_WASM_OPCODES_H_ 6 #define V8_WASM_OPCODES_H_
7 7
8 #include "src/globals.h" 8 #include "src/globals.h"
9 #include "src/machine-type.h" 9 #include "src/machine-type.h"
10 #include "src/runtime/runtime.h" 10 #include "src/runtime/runtime.h"
(...skipping 271 matching lines...) Expand 10 before | Expand all | Expand 10 after
282 V(I32AsmjsSConvertF64, 0xe2, i_d) \ 282 V(I32AsmjsSConvertF64, 0xe2, i_d) \
283 V(I32AsmjsUConvertF64, 0xe3, i_d) 283 V(I32AsmjsUConvertF64, 0xe3, i_d)
284 284
285 #define FOREACH_SIMD_0_OPERAND_OPCODE(V) \ 285 #define FOREACH_SIMD_0_OPERAND_OPCODE(V) \
286 V(F32x4Splat, 0xe500, s_f) \ 286 V(F32x4Splat, 0xe500, s_f) \
287 V(F32x4Abs, 0xe503, s_s) \ 287 V(F32x4Abs, 0xe503, s_s) \
288 V(F32x4Neg, 0xe504, s_s) \ 288 V(F32x4Neg, 0xe504, s_s) \
289 V(F32x4RecipApprox, 0xe506, s_s) \ 289 V(F32x4RecipApprox, 0xe506, s_s) \
290 V(F32x4RecipSqrtApprox, 0xe507, s_s) \ 290 V(F32x4RecipSqrtApprox, 0xe507, s_s) \
291 V(F32x4Add, 0xe508, s_ss) \ 291 V(F32x4Add, 0xe508, s_ss) \
292 V(F32x4AddHoriz, 0xe5b9, s_ss) \
292 V(F32x4Sub, 0xe509, s_ss) \ 293 V(F32x4Sub, 0xe509, s_ss) \
293 V(F32x4Mul, 0xe50a, s_ss) \ 294 V(F32x4Mul, 0xe50a, s_ss) \
294 V(F32x4Min, 0xe50c, s_ss) \ 295 V(F32x4Min, 0xe50c, s_ss) \
295 V(F32x4Max, 0xe50d, s_ss) \ 296 V(F32x4Max, 0xe50d, s_ss) \
296 V(F32x4Eq, 0xe510, s1x4_ss) \ 297 V(F32x4Eq, 0xe510, s1x4_ss) \
297 V(F32x4Ne, 0xe511, s1x4_ss) \ 298 V(F32x4Ne, 0xe511, s1x4_ss) \
298 V(F32x4Lt, 0xe512, s1x4_ss) \ 299 V(F32x4Lt, 0xe512, s1x4_ss) \
299 V(F32x4Le, 0xe513, s1x4_ss) \ 300 V(F32x4Le, 0xe513, s1x4_ss) \
300 V(F32x4Gt, 0xe514, s1x4_ss) \ 301 V(F32x4Gt, 0xe514, s1x4_ss) \
301 V(F32x4Ge, 0xe515, s1x4_ss) \ 302 V(F32x4Ge, 0xe515, s1x4_ss) \
302 V(F32x4SConvertI32x4, 0xe519, s_s) \ 303 V(F32x4SConvertI32x4, 0xe519, s_s) \
303 V(F32x4UConvertI32x4, 0xe51a, s_s) \ 304 V(F32x4UConvertI32x4, 0xe51a, s_s) \
304 V(I32x4Splat, 0xe51b, s_i) \ 305 V(I32x4Splat, 0xe51b, s_i) \
305 V(I32x4Neg, 0xe51e, s_s) \ 306 V(I32x4Neg, 0xe51e, s_s) \
306 V(I32x4Add, 0xe51f, s_ss) \ 307 V(I32x4Add, 0xe51f, s_ss) \
308 V(I32x4AddHoriz, 0xe5ba, s_ss) \
307 V(I32x4Sub, 0xe520, s_ss) \ 309 V(I32x4Sub, 0xe520, s_ss) \
308 V(I32x4Mul, 0xe521, s_ss) \ 310 V(I32x4Mul, 0xe521, s_ss) \
309 V(I32x4MinS, 0xe522, s_ss) \ 311 V(I32x4MinS, 0xe522, s_ss) \
310 V(I32x4MaxS, 0xe523, s_ss) \ 312 V(I32x4MaxS, 0xe523, s_ss) \
311 V(I32x4Eq, 0xe526, s1x4_ss) \ 313 V(I32x4Eq, 0xe526, s1x4_ss) \
312 V(I32x4Ne, 0xe527, s1x4_ss) \ 314 V(I32x4Ne, 0xe527, s1x4_ss) \
313 V(I32x4LtS, 0xe528, s1x4_ss) \ 315 V(I32x4LtS, 0xe528, s1x4_ss) \
314 V(I32x4LeS, 0xe529, s1x4_ss) \ 316 V(I32x4LeS, 0xe529, s1x4_ss) \
315 V(I32x4GtS, 0xe52a, s1x4_ss) \ 317 V(I32x4GtS, 0xe52a, s1x4_ss) \
316 V(I32x4GeS, 0xe52b, s1x4_ss) \ 318 V(I32x4GeS, 0xe52b, s1x4_ss) \
317 V(I32x4SConvertF32x4, 0xe52f, s_s) \ 319 V(I32x4SConvertF32x4, 0xe52f, s_s) \
318 V(I32x4UConvertF32x4, 0xe537, s_s) \ 320 V(I32x4UConvertF32x4, 0xe537, s_s) \
319 V(I32x4SConvertI16x8Low, 0xe594, s_s) \ 321 V(I32x4SConvertI16x8Low, 0xe594, s_s) \
320 V(I32x4SConvertI16x8High, 0xe595, s_s) \ 322 V(I32x4SConvertI16x8High, 0xe595, s_s) \
321 V(I32x4UConvertI16x8Low, 0xe596, s_s) \ 323 V(I32x4UConvertI16x8Low, 0xe596, s_s) \
322 V(I32x4UConvertI16x8High, 0xe597, s_s) \ 324 V(I32x4UConvertI16x8High, 0xe597, s_s) \
323 V(I32x4MinU, 0xe530, s_ss) \ 325 V(I32x4MinU, 0xe530, s_ss) \
324 V(I32x4MaxU, 0xe531, s_ss) \ 326 V(I32x4MaxU, 0xe531, s_ss) \
325 V(I32x4LtU, 0xe533, s1x4_ss) \ 327 V(I32x4LtU, 0xe533, s1x4_ss) \
326 V(I32x4LeU, 0xe534, s1x4_ss) \ 328 V(I32x4LeU, 0xe534, s1x4_ss) \
327 V(I32x4GtU, 0xe535, s1x4_ss) \ 329 V(I32x4GtU, 0xe535, s1x4_ss) \
328 V(I32x4GeU, 0xe536, s1x4_ss) \ 330 V(I32x4GeU, 0xe536, s1x4_ss) \
329 V(I16x8Splat, 0xe538, s_i) \ 331 V(I16x8Splat, 0xe538, s_i) \
330 V(I16x8Neg, 0xe53b, s_s) \ 332 V(I16x8Neg, 0xe53b, s_s) \
331 V(I16x8Add, 0xe53c, s_ss) \ 333 V(I16x8Add, 0xe53c, s_ss) \
332 V(I16x8AddSaturateS, 0xe53d, s_ss) \ 334 V(I16x8AddSaturateS, 0xe53d, s_ss) \
335 V(I16x8AddHoriz, 0xe5bb, s_ss) \
333 V(I16x8Sub, 0xe53e, s_ss) \ 336 V(I16x8Sub, 0xe53e, s_ss) \
334 V(I16x8SubSaturateS, 0xe53f, s_ss) \ 337 V(I16x8SubSaturateS, 0xe53f, s_ss) \
335 V(I16x8Mul, 0xe540, s_ss) \ 338 V(I16x8Mul, 0xe540, s_ss) \
336 V(I16x8MinS, 0xe541, s_ss) \ 339 V(I16x8MinS, 0xe541, s_ss) \
337 V(I16x8MaxS, 0xe542, s_ss) \ 340 V(I16x8MaxS, 0xe542, s_ss) \
338 V(I16x8Eq, 0xe545, s1x8_ss) \ 341 V(I16x8Eq, 0xe545, s1x8_ss) \
339 V(I16x8Ne, 0xe546, s1x8_ss) \ 342 V(I16x8Ne, 0xe546, s1x8_ss) \
340 V(I16x8LtS, 0xe547, s1x8_ss) \ 343 V(I16x8LtS, 0xe547, s1x8_ss) \
341 V(I16x8LeS, 0xe548, s1x8_ss) \ 344 V(I16x8LeS, 0xe548, s1x8_ss) \
342 V(I16x8GtS, 0xe549, s1x8_ss) \ 345 V(I16x8GtS, 0xe549, s1x8_ss) \
(...skipping 415 matching lines...) Expand 10 before | Expand all | Expand 10 after
758 default: 761 default:
759 return "<unknown>"; 762 return "<unknown>";
760 } 763 }
761 } 764 }
762 }; 765 };
763 } // namespace wasm 766 } // namespace wasm
764 } // namespace internal 767 } // namespace internal
765 } // namespace v8 768 } // namespace v8
766 769
767 #endif // V8_WASM_OPCODES_H_ 770 #endif // V8_WASM_OPCODES_H_
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