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Issue 2804883008: [WASM SIMD] Implement horizontal add for float and integer types. (Closed)
Patch Set: Rebase, reformat. Created 3 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 2423 matching lines...) Expand 10 before | Expand all | Expand 10 after
2434 V(I32x4Shl) \ 2434 V(I32x4Shl) \
2435 V(I32x4ShrS) \ 2435 V(I32x4ShrS) \
2436 V(I32x4ShrU) \ 2436 V(I32x4ShrU) \
2437 V(I16x8Shl) \ 2437 V(I16x8Shl) \
2438 V(I16x8ShrS) \ 2438 V(I16x8ShrS) \
2439 V(I16x8ShrU) \ 2439 V(I16x8ShrU) \
2440 V(I8x16Shl) \ 2440 V(I8x16Shl) \
2441 V(I8x16ShrS) \ 2441 V(I8x16ShrS) \
2442 V(I8x16ShrU) 2442 V(I8x16ShrU)
2443 2443
2444 #define SIMD_BINOP_LIST(V) \ 2444 #define SIMD_BINOP_LIST(V) \
2445 V(F32x4Add, kArmF32x4Add) \ 2445 V(F32x4Add, kArmF32x4Add) \
2446 V(F32x4Sub, kArmF32x4Sub) \ 2446 V(F32x4AddHoriz, kArmF32x4AddHoriz) \
2447 V(F32x4Mul, kArmF32x4Mul) \ 2447 V(F32x4Sub, kArmF32x4Sub) \
2448 V(F32x4Min, kArmF32x4Min) \ 2448 V(F32x4Mul, kArmF32x4Mul) \
2449 V(F32x4Max, kArmF32x4Max) \ 2449 V(F32x4Min, kArmF32x4Min) \
2450 V(F32x4Eq, kArmF32x4Eq) \ 2450 V(F32x4Max, kArmF32x4Max) \
2451 V(F32x4Ne, kArmF32x4Ne) \ 2451 V(F32x4Eq, kArmF32x4Eq) \
2452 V(F32x4Lt, kArmF32x4Lt) \ 2452 V(F32x4Ne, kArmF32x4Ne) \
2453 V(F32x4Le, kArmF32x4Le) \ 2453 V(F32x4Lt, kArmF32x4Lt) \
2454 V(I32x4Add, kArmI32x4Add) \ 2454 V(F32x4Le, kArmF32x4Le) \
2455 V(I32x4Sub, kArmI32x4Sub) \ 2455 V(I32x4Add, kArmI32x4Add) \
2456 V(I32x4Mul, kArmI32x4Mul) \ 2456 V(I32x4AddHoriz, kArmI32x4AddHoriz) \
2457 V(I32x4MinS, kArmI32x4MinS) \ 2457 V(I32x4Sub, kArmI32x4Sub) \
2458 V(I32x4MaxS, kArmI32x4MaxS) \ 2458 V(I32x4Mul, kArmI32x4Mul) \
2459 V(I32x4Eq, kArmI32x4Eq) \ 2459 V(I32x4MinS, kArmI32x4MinS) \
2460 V(I32x4Ne, kArmI32x4Ne) \ 2460 V(I32x4MaxS, kArmI32x4MaxS) \
2461 V(I32x4LtS, kArmI32x4LtS) \ 2461 V(I32x4Eq, kArmI32x4Eq) \
2462 V(I32x4LeS, kArmI32x4LeS) \ 2462 V(I32x4Ne, kArmI32x4Ne) \
2463 V(I32x4MinU, kArmI32x4MinU) \ 2463 V(I32x4LtS, kArmI32x4LtS) \
2464 V(I32x4MaxU, kArmI32x4MaxU) \ 2464 V(I32x4LeS, kArmI32x4LeS) \
2465 V(I32x4LtU, kArmI32x4LtU) \ 2465 V(I32x4MinU, kArmI32x4MinU) \
2466 V(I32x4LeU, kArmI32x4LeU) \ 2466 V(I32x4MaxU, kArmI32x4MaxU) \
2467 V(I16x8SConvertI32x4, kArmI16x8SConvertI32x4) \ 2467 V(I32x4LtU, kArmI32x4LtU) \
2468 V(I16x8Add, kArmI16x8Add) \ 2468 V(I32x4LeU, kArmI32x4LeU) \
2469 V(I16x8AddSaturateS, kArmI16x8AddSaturateS) \ 2469 V(I16x8SConvertI32x4, kArmI16x8SConvertI32x4) \
2470 V(I16x8Sub, kArmI16x8Sub) \ 2470 V(I16x8Add, kArmI16x8Add) \
2471 V(I16x8SubSaturateS, kArmI16x8SubSaturateS) \ 2471 V(I16x8AddSaturateS, kArmI16x8AddSaturateS) \
2472 V(I16x8Mul, kArmI16x8Mul) \ 2472 V(I16x8AddHoriz, kArmI16x8AddHoriz) \
2473 V(I16x8MinS, kArmI16x8MinS) \ 2473 V(I16x8Sub, kArmI16x8Sub) \
2474 V(I16x8MaxS, kArmI16x8MaxS) \ 2474 V(I16x8SubSaturateS, kArmI16x8SubSaturateS) \
2475 V(I16x8Eq, kArmI16x8Eq) \ 2475 V(I16x8Mul, kArmI16x8Mul) \
2476 V(I16x8Ne, kArmI16x8Ne) \ 2476 V(I16x8MinS, kArmI16x8MinS) \
2477 V(I16x8LtS, kArmI16x8LtS) \ 2477 V(I16x8MaxS, kArmI16x8MaxS) \
2478 V(I16x8LeS, kArmI16x8LeS) \ 2478 V(I16x8Eq, kArmI16x8Eq) \
2479 V(I16x8UConvertI32x4, kArmI16x8UConvertI32x4) \ 2479 V(I16x8Ne, kArmI16x8Ne) \
2480 V(I16x8AddSaturateU, kArmI16x8AddSaturateU) \ 2480 V(I16x8LtS, kArmI16x8LtS) \
2481 V(I16x8SubSaturateU, kArmI16x8SubSaturateU) \ 2481 V(I16x8LeS, kArmI16x8LeS) \
2482 V(I16x8MinU, kArmI16x8MinU) \ 2482 V(I16x8UConvertI32x4, kArmI16x8UConvertI32x4) \
2483 V(I16x8MaxU, kArmI16x8MaxU) \ 2483 V(I16x8AddSaturateU, kArmI16x8AddSaturateU) \
2484 V(I16x8LtU, kArmI16x8LtU) \ 2484 V(I16x8SubSaturateU, kArmI16x8SubSaturateU) \
2485 V(I16x8LeU, kArmI16x8LeU) \ 2485 V(I16x8MinU, kArmI16x8MinU) \
2486 V(I8x16SConvertI16x8, kArmI8x16SConvertI16x8) \ 2486 V(I16x8MaxU, kArmI16x8MaxU) \
2487 V(I8x16Add, kArmI8x16Add) \ 2487 V(I16x8LtU, kArmI16x8LtU) \
2488 V(I8x16AddSaturateS, kArmI8x16AddSaturateS) \ 2488 V(I16x8LeU, kArmI16x8LeU) \
2489 V(I8x16Sub, kArmI8x16Sub) \ 2489 V(I8x16SConvertI16x8, kArmI8x16SConvertI16x8) \
2490 V(I8x16SubSaturateS, kArmI8x16SubSaturateS) \ 2490 V(I8x16Add, kArmI8x16Add) \
2491 V(I8x16Mul, kArmI8x16Mul) \ 2491 V(I8x16AddSaturateS, kArmI8x16AddSaturateS) \
2492 V(I8x16MinS, kArmI8x16MinS) \ 2492 V(I8x16Sub, kArmI8x16Sub) \
2493 V(I8x16MaxS, kArmI8x16MaxS) \ 2493 V(I8x16SubSaturateS, kArmI8x16SubSaturateS) \
2494 V(I8x16Eq, kArmI8x16Eq) \ 2494 V(I8x16Mul, kArmI8x16Mul) \
2495 V(I8x16Ne, kArmI8x16Ne) \ 2495 V(I8x16MinS, kArmI8x16MinS) \
2496 V(I8x16LtS, kArmI8x16LtS) \ 2496 V(I8x16MaxS, kArmI8x16MaxS) \
2497 V(I8x16LeS, kArmI8x16LeS) \ 2497 V(I8x16Eq, kArmI8x16Eq) \
2498 V(I8x16UConvertI16x8, kArmI8x16UConvertI16x8) \ 2498 V(I8x16Ne, kArmI8x16Ne) \
2499 V(I8x16AddSaturateU, kArmI8x16AddSaturateU) \ 2499 V(I8x16LtS, kArmI8x16LtS) \
2500 V(I8x16SubSaturateU, kArmI8x16SubSaturateU) \ 2500 V(I8x16LeS, kArmI8x16LeS) \
2501 V(I8x16MinU, kArmI8x16MinU) \ 2501 V(I8x16UConvertI16x8, kArmI8x16UConvertI16x8) \
2502 V(I8x16MaxU, kArmI8x16MaxU) \ 2502 V(I8x16AddSaturateU, kArmI8x16AddSaturateU) \
2503 V(I8x16LtU, kArmI8x16LtU) \ 2503 V(I8x16SubSaturateU, kArmI8x16SubSaturateU) \
2504 V(I8x16LeU, kArmI8x16LeU) \ 2504 V(I8x16MinU, kArmI8x16MinU) \
2505 V(S128And, kArmS128And) \ 2505 V(I8x16MaxU, kArmI8x16MaxU) \
2506 V(S128Or, kArmS128Or) \ 2506 V(I8x16LtU, kArmI8x16LtU) \
2507 V(S128Xor, kArmS128Xor) \ 2507 V(I8x16LeU, kArmI8x16LeU) \
2508 V(S1x4And, kArmS128And) \ 2508 V(S128And, kArmS128And) \
2509 V(S1x4Or, kArmS128Or) \ 2509 V(S128Or, kArmS128Or) \
2510 V(S1x4Xor, kArmS128Xor) \ 2510 V(S128Xor, kArmS128Xor) \
2511 V(S1x8And, kArmS128And) \ 2511 V(S1x4And, kArmS128And) \
2512 V(S1x8Or, kArmS128Or) \ 2512 V(S1x4Or, kArmS128Or) \
2513 V(S1x8Xor, kArmS128Xor) \ 2513 V(S1x4Xor, kArmS128Xor) \
2514 V(S1x16And, kArmS128And) \ 2514 V(S1x8And, kArmS128And) \
2515 V(S1x16Or, kArmS128Or) \ 2515 V(S1x8Or, kArmS128Or) \
2516 V(S1x8Xor, kArmS128Xor) \
2517 V(S1x16And, kArmS128And) \
2518 V(S1x16Or, kArmS128Or) \
2516 V(S1x16Xor, kArmS128Xor) 2519 V(S1x16Xor, kArmS128Xor)
2517 2520
2518 #define SIMD_SHUFFLE_OP_LIST(V) \ 2521 #define SIMD_SHUFFLE_OP_LIST(V) \
2519 V(S32x4ZipLeft) \ 2522 V(S32x4ZipLeft) \
2520 V(S32x4ZipRight) \ 2523 V(S32x4ZipRight) \
2521 V(S32x4UnzipLeft) \ 2524 V(S32x4UnzipLeft) \
2522 V(S32x4UnzipRight) \ 2525 V(S32x4UnzipRight) \
2523 V(S32x4TransposeLeft) \ 2526 V(S32x4TransposeLeft) \
2524 V(S32x4TransposeRight) \ 2527 V(S32x4TransposeRight) \
2525 V(S16x8ZipLeft) \ 2528 V(S16x8ZipLeft) \
(...skipping 122 matching lines...) Expand 10 before | Expand all | Expand 10 after
2648 Vector<MachineType> req_aligned = Vector<MachineType>::New(2); 2651 Vector<MachineType> req_aligned = Vector<MachineType>::New(2);
2649 req_aligned[0] = MachineType::Float32(); 2652 req_aligned[0] = MachineType::Float32();
2650 req_aligned[1] = MachineType::Float64(); 2653 req_aligned[1] = MachineType::Float64();
2651 return MachineOperatorBuilder::AlignmentRequirements:: 2654 return MachineOperatorBuilder::AlignmentRequirements::
2652 SomeUnalignedAccessUnsupported(req_aligned, req_aligned); 2655 SomeUnalignedAccessUnsupported(req_aligned, req_aligned);
2653 } 2656 }
2654 2657
2655 } // namespace compiler 2658 } // namespace compiler
2656 } // namespace internal 2659 } // namespace internal
2657 } // namespace v8 2660 } // namespace v8
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