| Index: src/compiler/mips64/instruction-selector-mips64.cc
|
| diff --git a/src/compiler/mips64/instruction-selector-mips64.cc b/src/compiler/mips64/instruction-selector-mips64.cc
|
| index be195593632b540b1452c2a9f77d93e9153d741e..b201884b4f47bdd9c1d68005bfcfba62fe8b2311 100644
|
| --- a/src/compiler/mips64/instruction-selector-mips64.cc
|
| +++ b/src/compiler/mips64/instruction-selector-mips64.cc
|
| @@ -394,7 +394,9 @@ void InstructionSelector::VisitLoad(Node* node) {
|
| case MachineRepresentation::kWord64:
|
| opcode = kMips64Ld;
|
| break;
|
| - case MachineRepresentation::kSimd128: // Fall through.
|
| + case MachineRepresentation::kSimd128:
|
| + opcode = kMips64MsaLd;
|
| + break;
|
| case MachineRepresentation::kSimd1x4: // Fall through.
|
| case MachineRepresentation::kSimd1x8: // Fall through.
|
| case MachineRepresentation::kSimd1x16: // Fall through.
|
| @@ -474,7 +476,9 @@ void InstructionSelector::VisitStore(Node* node) {
|
| case MachineRepresentation::kWord64:
|
| opcode = kMips64Sd;
|
| break;
|
| - case MachineRepresentation::kSimd128: // Fall through.
|
| + case MachineRepresentation::kSimd128:
|
| + opcode = kMips64MsaSt;
|
| + break;
|
| case MachineRepresentation::kSimd1x4: // Fall through.
|
| case MachineRepresentation::kSimd1x8: // Fall through.
|
| case MachineRepresentation::kSimd1x16: // Fall through.
|
| @@ -1768,7 +1772,9 @@ void InstructionSelector::VisitUnalignedLoad(Node* node) {
|
| case MachineRepresentation::kWord64:
|
| opcode = kMips64Uld;
|
| break;
|
| - case MachineRepresentation::kSimd128: // Fall through.
|
| + case MachineRepresentation::kSimd128:
|
| + opcode = kMips64MsaLd;
|
| + break;
|
| case MachineRepresentation::kSimd1x4: // Fall through.
|
| case MachineRepresentation::kSimd1x8: // Fall through.
|
| case MachineRepresentation::kSimd1x16: // Fall through.
|
| @@ -1821,7 +1827,9 @@ void InstructionSelector::VisitUnalignedStore(Node* node) {
|
| case MachineRepresentation::kWord64:
|
| opcode = kMips64Usd;
|
| break;
|
| - case MachineRepresentation::kSimd128: // Fall through.
|
| + case MachineRepresentation::kSimd128:
|
| + opcode = kMips64MsaSt;
|
| + break;
|
| case MachineRepresentation::kSimd1x4: // Fall through.
|
| case MachineRepresentation::kSimd1x8: // Fall through.
|
| case MachineRepresentation::kSimd1x16: // Fall through.
|
| @@ -2726,6 +2734,78 @@ void InstructionSelector::VisitF32x4UConvertI32x4(Node* node) {
|
| VisitRR(this, kMips64F32x4UConvertI32x4, node);
|
| }
|
|
|
| +void InstructionSelector::VisitS1x4And(Node* node) {
|
| + VisitRRR(this, kMips64S128And, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x4Or(Node* node) {
|
| + VisitRRR(this, kMips64S128Or, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x4Xor(Node* node) {
|
| + VisitRRR(this, kMips64S128Xor, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x4Not(Node* node) {
|
| + VisitRR(this, kMips64S128Not, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x4AnyTrue(Node* node) {
|
| + VisitRR(this, kMips64S1x4AnyTrue, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x4AllTrue(Node* node) {
|
| + VisitRR(this, kMips64S1x4AllTrue, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x8And(Node* node) {
|
| + VisitRRR(this, kMips64S128And, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x8Or(Node* node) {
|
| + VisitRRR(this, kMips64S128Or, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x8Xor(Node* node) {
|
| + VisitRRR(this, kMips64S128Xor, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x8Not(Node* node) {
|
| + VisitRR(this, kMips64S128Not, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x8AnyTrue(Node* node) {
|
| + VisitRR(this, kMips64S1x8AnyTrue, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x8AllTrue(Node* node) {
|
| + VisitRR(this, kMips64S1x8AllTrue, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x16And(Node* node) {
|
| + VisitRRR(this, kMips64S128And, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x16Or(Node* node) {
|
| + VisitRRR(this, kMips64S128Or, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x16Xor(Node* node) {
|
| + VisitRRR(this, kMips64S128Xor, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x16Not(Node* node) {
|
| + VisitRR(this, kMips64S128Not, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x16AnyTrue(Node* node) {
|
| + VisitRR(this, kMips64S1x16AnyTrue, node);
|
| +}
|
| +
|
| +void InstructionSelector::VisitS1x16AllTrue(Node* node) {
|
| + VisitRR(this, kMips64S1x16AllTrue, node);
|
| +}
|
| +
|
| // static
|
| MachineOperatorBuilder::Flags
|
| InstructionSelector::SupportedMachineOperatorFlags() {
|
|
|