OLD | NEW |
1 // Copyright 2016 the V8 project authors. All rights reserved. | 1 // Copyright 2016 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/assembler-inl.h" | 5 #include "src/assembler-inl.h" |
6 #include "test/cctest/cctest.h" | 6 #include "test/cctest/cctest.h" |
7 #include "test/cctest/compiler/value-helper.h" | 7 #include "test/cctest/compiler/value-helper.h" |
8 #include "test/cctest/wasm/wasm-run-utils.h" | 8 #include "test/cctest/wasm/wasm-run-utils.h" |
9 #include "test/common/wasm/wasm-macro-gen.h" | 9 #include "test/common/wasm/wasm-macro-gen.h" |
10 | 10 |
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1793 } | 1793 } |
1794 RunBinaryLaneOpTest<T>(simd_op, expected); | 1794 RunBinaryLaneOpTest<T>(simd_op, expected); |
1795 } | 1795 } |
1796 } | 1796 } |
1797 | 1797 |
1798 WASM_SIMD_TEST(S32x4Concat) { RunConcatOpTest<int32_t>(kExprS32x4Shuffle); } | 1798 WASM_SIMD_TEST(S32x4Concat) { RunConcatOpTest<int32_t>(kExprS32x4Shuffle); } |
1799 | 1799 |
1800 WASM_SIMD_TEST(S16x8Concat) { RunConcatOpTest<int16_t>(kExprS16x8Shuffle); } | 1800 WASM_SIMD_TEST(S16x8Concat) { RunConcatOpTest<int16_t>(kExprS16x8Shuffle); } |
1801 | 1801 |
1802 WASM_SIMD_TEST(S8x16Concat) { RunConcatOpTest<int8_t>(kExprS8x16Shuffle); } | 1802 WASM_SIMD_TEST(S8x16Concat) { RunConcatOpTest<int8_t>(kExprS8x16Shuffle); } |
| 1803 #endif // V8_TARGET_ARCH_ARM |
1803 | 1804 |
| 1805 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
1804 // Boolean unary operations are 'AllTrue' and 'AnyTrue', which return an integer | 1806 // Boolean unary operations are 'AllTrue' and 'AnyTrue', which return an integer |
1805 // result. Use relational ops on numeric vectors to create the boolean vector | 1807 // result. Use relational ops on numeric vectors to create the boolean vector |
1806 // test inputs. Test inputs with all true, all false, one true, and one false. | 1808 // test inputs. Test inputs with all true, all false, one true, and one false. |
1807 #define WASM_SIMD_BOOL_REDUCTION_TEST(format, lanes) \ | 1809 #define WASM_SIMD_BOOL_REDUCTION_TEST(format, lanes) \ |
1808 WASM_SIMD_TEST(ReductionTest##lanes) { \ | 1810 WASM_SIMD_TEST(ReductionTest##lanes) { \ |
1809 WasmRunner<int32_t> r(kExecuteCompiled); \ | 1811 WasmRunner<int32_t> r(kExecuteCompiled); \ |
1810 byte zero = r.AllocateLocal(kWasmS128); \ | 1812 byte zero = r.AllocateLocal(kWasmS128); \ |
1811 byte one_one = r.AllocateLocal(kWasmS128); \ | 1813 byte one_one = r.AllocateLocal(kWasmS128); \ |
1812 byte reduced = r.AllocateLocal(kWasmI32); \ | 1814 byte reduced = r.AllocateLocal(kWasmI32); \ |
1813 BUILD(r, WASM_SET_LOCAL(zero, WASM_SIMD_I##format##_SPLAT(WASM_ZERO)), \ | 1815 BUILD(r, WASM_SET_LOCAL(zero, WASM_SIMD_I##format##_SPLAT(WASM_ZERO)), \ |
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1963 | 1965 |
1964 WASM_SIMD_TEST(S1x8Or) { RunS1x8BinOpTest(kExprS1x8Or, Or); } | 1966 WASM_SIMD_TEST(S1x8Or) { RunS1x8BinOpTest(kExprS1x8Or, Or); } |
1965 | 1967 |
1966 WASM_SIMD_TEST(S1x8Xor) { RunS1x8BinOpTest(kExprS1x8Xor, Xor); } | 1968 WASM_SIMD_TEST(S1x8Xor) { RunS1x8BinOpTest(kExprS1x8Xor, Xor); } |
1967 | 1969 |
1968 WASM_SIMD_TEST(S1x16And) { RunS1x16BinOpTest(kExprS1x16And, And); } | 1970 WASM_SIMD_TEST(S1x16And) { RunS1x16BinOpTest(kExprS1x16And, And); } |
1969 | 1971 |
1970 WASM_SIMD_TEST(S1x16Or) { RunS1x16BinOpTest(kExprS1x16Or, Or); } | 1972 WASM_SIMD_TEST(S1x16Or) { RunS1x16BinOpTest(kExprS1x16Or, Or); } |
1971 | 1973 |
1972 WASM_SIMD_TEST(S1x16Xor) { RunS1x16BinOpTest(kExprS1x16Xor, Xor); } | 1974 WASM_SIMD_TEST(S1x16Xor) { RunS1x16BinOpTest(kExprS1x16Xor, Xor); } |
1973 #endif // !V8_TARGET_ARCH_ARM | 1975 #endif // !V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
1974 | 1976 |
1975 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET | 1977 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || \ |
| 1978 V8_TARGET_ARCH_MIPS64 |
1976 WASM_SIMD_TEST(SimdI32x4ExtractWithF32x4) { | 1979 WASM_SIMD_TEST(SimdI32x4ExtractWithF32x4) { |
1977 WasmRunner<int32_t> r(kExecuteCompiled); | 1980 WasmRunner<int32_t> r(kExecuteCompiled); |
1978 BUILD(r, WASM_IF_ELSE_I( | 1981 BUILD(r, WASM_IF_ELSE_I( |
1979 WASM_I32_EQ(WASM_SIMD_I32x4_EXTRACT_LANE( | 1982 WASM_I32_EQ(WASM_SIMD_I32x4_EXTRACT_LANE( |
1980 0, WASM_SIMD_F32x4_SPLAT(WASM_F32(30.5))), | 1983 0, WASM_SIMD_F32x4_SPLAT(WASM_F32(30.5))), |
1981 WASM_I32_REINTERPRET_F32(WASM_F32(30.5))), | 1984 WASM_I32_REINTERPRET_F32(WASM_F32(30.5))), |
1982 WASM_I32V(1), WASM_I32V(0))); | 1985 WASM_I32V(1), WASM_I32V(0))); |
1983 CHECK_EQ(1, r.Call()); | 1986 CHECK_EQ(1, r.Call()); |
1984 } | 1987 } |
1985 | 1988 |
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2019 WASM_I32_EQ( | 2022 WASM_I32_EQ( |
2020 WASM_SIMD_I32x4_EXTRACT_LANE( | 2023 WASM_SIMD_I32x4_EXTRACT_LANE( |
2021 0, WASM_SIMD_BINOP(kExprI32x4Add, | 2024 0, WASM_SIMD_BINOP(kExprI32x4Add, |
2022 WASM_SIMD_F32x4_SPLAT(WASM_F32(21.25)), | 2025 WASM_SIMD_F32x4_SPLAT(WASM_F32(21.25)), |
2023 WASM_SIMD_F32x4_SPLAT(WASM_F32(31.5)))), | 2026 WASM_SIMD_F32x4_SPLAT(WASM_F32(31.5)))), |
2024 WASM_I32_ADD(WASM_I32_REINTERPRET_F32(WASM_F32(21.25)), | 2027 WASM_I32_ADD(WASM_I32_REINTERPRET_F32(WASM_F32(21.25)), |
2025 WASM_I32_REINTERPRET_F32(WASM_F32(31.5)))), | 2028 WASM_I32_REINTERPRET_F32(WASM_F32(31.5)))), |
2026 WASM_I32V(1), WASM_I32V(0))); | 2029 WASM_I32V(1), WASM_I32V(0))); |
2027 CHECK_EQ(1, r.Call()); | 2030 CHECK_EQ(1, r.Call()); |
2028 } | 2031 } |
2029 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET | 2032 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || |
| 2033 // V8_TARGET_ARCH_MIPS64 |
2030 | 2034 |
2031 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 | 2035 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || \ |
| 2036 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
2032 WASM_SIMD_TEST(SimdI32x4Local) { | 2037 WASM_SIMD_TEST(SimdI32x4Local) { |
2033 WasmRunner<int32_t> r(kExecuteCompiled); | 2038 WasmRunner<int32_t> r(kExecuteCompiled); |
2034 r.AllocateLocal(kWasmS128); | 2039 r.AllocateLocal(kWasmS128); |
2035 BUILD(r, WASM_SET_LOCAL(0, WASM_SIMD_I32x4_SPLAT(WASM_I32V(31))), | 2040 BUILD(r, WASM_SET_LOCAL(0, WASM_SIMD_I32x4_SPLAT(WASM_I32V(31))), |
2036 | 2041 |
2037 WASM_SIMD_I32x4_EXTRACT_LANE(0, WASM_GET_LOCAL(0))); | 2042 WASM_SIMD_I32x4_EXTRACT_LANE(0, WASM_GET_LOCAL(0))); |
2038 CHECK_EQ(31, r.Call()); | 2043 CHECK_EQ(31, r.Call()); |
2039 } | 2044 } |
2040 | 2045 |
2041 WASM_SIMD_TEST(SimdI32x4SplatFromExtract) { | 2046 WASM_SIMD_TEST(SimdI32x4SplatFromExtract) { |
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2075 WASM_SET_LOCAL(0, WASM_I32V(0))), | 2080 WASM_SET_LOCAL(0, WASM_I32V(0))), |
2076 WASM_IF(WASM_I32_NE(WASM_SIMD_I32x4_EXTRACT_LANE(2, WASM_GET_LOCAL(1)), | 2081 WASM_IF(WASM_I32_NE(WASM_SIMD_I32x4_EXTRACT_LANE(2, WASM_GET_LOCAL(1)), |
2077 WASM_I32V(28)), | 2082 WASM_I32V(28)), |
2078 WASM_SET_LOCAL(0, WASM_I32V(0))), | 2083 WASM_SET_LOCAL(0, WASM_I32V(0))), |
2079 WASM_IF(WASM_I32_NE(WASM_SIMD_I32x4_EXTRACT_LANE(3, WASM_GET_LOCAL(1)), | 2084 WASM_IF(WASM_I32_NE(WASM_SIMD_I32x4_EXTRACT_LANE(3, WASM_GET_LOCAL(1)), |
2080 WASM_I32V(36)), | 2085 WASM_I32V(36)), |
2081 WASM_SET_LOCAL(0, WASM_I32V(0))), | 2086 WASM_SET_LOCAL(0, WASM_I32V(0))), |
2082 WASM_GET_LOCAL(0)); | 2087 WASM_GET_LOCAL(0)); |
2083 CHECK_EQ(1, r.Call()); | 2088 CHECK_EQ(1, r.Call()); |
2084 } | 2089 } |
2085 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 | 2090 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || |
| 2091 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
2086 | 2092 |
2087 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET | 2093 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || \ |
| 2094 V8_TARGET_ARCH_MIPS64 |
2088 WASM_SIMD_TEST(SimdF32x4For) { | 2095 WASM_SIMD_TEST(SimdF32x4For) { |
2089 WasmRunner<int32_t> r(kExecuteCompiled); | 2096 WasmRunner<int32_t> r(kExecuteCompiled); |
2090 r.AllocateLocal(kWasmI32); | 2097 r.AllocateLocal(kWasmI32); |
2091 r.AllocateLocal(kWasmS128); | 2098 r.AllocateLocal(kWasmS128); |
2092 BUILD(r, WASM_SET_LOCAL(1, WASM_SIMD_F32x4_SPLAT(WASM_F32(21.25))), | 2099 BUILD(r, WASM_SET_LOCAL(1, WASM_SIMD_F32x4_SPLAT(WASM_F32(21.25))), |
2093 WASM_SET_LOCAL(1, WASM_SIMD_F32x4_REPLACE_LANE(3, WASM_GET_LOCAL(1), | 2100 WASM_SET_LOCAL(1, WASM_SIMD_F32x4_REPLACE_LANE(3, WASM_GET_LOCAL(1), |
2094 WASM_F32(19.5))), | 2101 WASM_F32(19.5))), |
2095 WASM_SET_LOCAL(0, WASM_I32V(0)), | 2102 WASM_SET_LOCAL(0, WASM_I32V(0)), |
2096 WASM_LOOP( | 2103 WASM_LOOP( |
2097 WASM_SET_LOCAL( | 2104 WASM_SET_LOCAL( |
2098 1, WASM_SIMD_BINOP(kExprF32x4Add, WASM_GET_LOCAL(1), | 2105 1, WASM_SIMD_BINOP(kExprF32x4Add, WASM_GET_LOCAL(1), |
2099 WASM_SIMD_F32x4_SPLAT(WASM_F32(2.0)))), | 2106 WASM_SIMD_F32x4_SPLAT(WASM_F32(2.0)))), |
2100 WASM_IF(WASM_I32_NE(WASM_INC_LOCAL(0), WASM_I32V(3)), WASM_BR(1))), | 2107 WASM_IF(WASM_I32_NE(WASM_INC_LOCAL(0), WASM_I32V(3)), WASM_BR(1))), |
2101 WASM_SET_LOCAL(0, WASM_I32V(1)), | 2108 WASM_SET_LOCAL(0, WASM_I32V(1)), |
2102 WASM_IF(WASM_F32_NE(WASM_SIMD_F32x4_EXTRACT_LANE(0, WASM_GET_LOCAL(1)), | 2109 WASM_IF(WASM_F32_NE(WASM_SIMD_F32x4_EXTRACT_LANE(0, WASM_GET_LOCAL(1)), |
2103 WASM_F32(27.25)), | 2110 WASM_F32(27.25)), |
2104 WASM_SET_LOCAL(0, WASM_I32V(0))), | 2111 WASM_SET_LOCAL(0, WASM_I32V(0))), |
2105 WASM_IF(WASM_F32_NE(WASM_SIMD_F32x4_EXTRACT_LANE(3, WASM_GET_LOCAL(1)), | 2112 WASM_IF(WASM_F32_NE(WASM_SIMD_F32x4_EXTRACT_LANE(3, WASM_GET_LOCAL(1)), |
2106 WASM_F32(25.5)), | 2113 WASM_F32(25.5)), |
2107 WASM_SET_LOCAL(0, WASM_I32V(0))), | 2114 WASM_SET_LOCAL(0, WASM_I32V(0))), |
2108 WASM_GET_LOCAL(0)); | 2115 WASM_GET_LOCAL(0)); |
2109 CHECK_EQ(1, r.Call()); | 2116 CHECK_EQ(1, r.Call()); |
2110 } | 2117 } |
2111 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET | 2118 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || |
| 2119 // V8_TARGET_ARCH_MIPS64 |
2112 | 2120 |
2113 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 | 2121 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || \ |
| 2122 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
2114 | 2123 |
2115 template <typename T, int numLanes = 4> | 2124 template <typename T, int numLanes = 4> |
2116 void SetVectorByLanes(T* v, const std::array<T, numLanes>& arr) { | 2125 void SetVectorByLanes(T* v, const std::array<T, numLanes>& arr) { |
2117 for (int lane = 0; lane < numLanes; lane++) { | 2126 for (int lane = 0; lane < numLanes; lane++) { |
2118 const T& value = arr[lane]; | 2127 const T& value = arr[lane]; |
2119 #if defined(V8_TARGET_BIG_ENDIAN) | 2128 #if defined(V8_TARGET_BIG_ENDIAN) |
2120 v[numLanes - 1 - lane] = value; | 2129 v[numLanes - 1 - lane] = value; |
2121 #else | 2130 #else |
2122 v[lane] = value; | 2131 v[lane] = value; |
2123 #endif | 2132 #endif |
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2170 WASM_I32V(45))), | 2179 WASM_I32V(45))), |
2171 WASM_SET_GLOBAL(0, WASM_SIMD_I32x4_REPLACE_LANE(3, WASM_GET_GLOBAL(0), | 2180 WASM_SET_GLOBAL(0, WASM_SIMD_I32x4_REPLACE_LANE(3, WASM_GET_GLOBAL(0), |
2172 WASM_I32V(56))), | 2181 WASM_I32V(56))), |
2173 WASM_I32V(1)); | 2182 WASM_I32V(1)); |
2174 CHECK_EQ(1, r.Call(0)); | 2183 CHECK_EQ(1, r.Call(0)); |
2175 CHECK_EQ(GetScalar(global, 0), 23); | 2184 CHECK_EQ(GetScalar(global, 0), 23); |
2176 CHECK_EQ(GetScalar(global, 1), 34); | 2185 CHECK_EQ(GetScalar(global, 1), 34); |
2177 CHECK_EQ(GetScalar(global, 2), 45); | 2186 CHECK_EQ(GetScalar(global, 2), 45); |
2178 CHECK_EQ(GetScalar(global, 3), 56); | 2187 CHECK_EQ(GetScalar(global, 3), 56); |
2179 } | 2188 } |
2180 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 | 2189 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || |
| 2190 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
2181 | 2191 |
2182 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET | 2192 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || \ |
| 2193 V8_TARGET_ARCH_MIPS64 |
2183 WASM_SIMD_TEST(SimdF32x4GetGlobal) { | 2194 WASM_SIMD_TEST(SimdF32x4GetGlobal) { |
2184 WasmRunner<int32_t, int32_t> r(kExecuteCompiled); | 2195 WasmRunner<int32_t, int32_t> r(kExecuteCompiled); |
2185 float* global = r.module().AddGlobal<float>(kWasmS128); | 2196 float* global = r.module().AddGlobal<float>(kWasmS128); |
2186 SetVectorByLanes<float>(global, {{0.0, 1.5, 2.25, 3.5}}); | 2197 SetVectorByLanes<float>(global, {{0.0, 1.5, 2.25, 3.5}}); |
2187 r.AllocateLocal(kWasmI32); | 2198 r.AllocateLocal(kWasmI32); |
2188 BUILD( | 2199 BUILD( |
2189 r, WASM_SET_LOCAL(1, WASM_I32V(1)), | 2200 r, WASM_SET_LOCAL(1, WASM_I32V(1)), |
2190 WASM_IF(WASM_F32_NE(WASM_F32(0.0), | 2201 WASM_IF(WASM_F32_NE(WASM_F32(0.0), |
2191 WASM_SIMD_F32x4_EXTRACT_LANE(0, WASM_GET_GLOBAL(0))), | 2202 WASM_SIMD_F32x4_EXTRACT_LANE(0, WASM_GET_GLOBAL(0))), |
2192 WASM_SET_LOCAL(1, WASM_I32V(0))), | 2203 WASM_SET_LOCAL(1, WASM_I32V(0))), |
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2213 WASM_F32(32.25))), | 2224 WASM_F32(32.25))), |
2214 WASM_SET_GLOBAL(0, WASM_SIMD_F32x4_REPLACE_LANE(3, WASM_GET_GLOBAL(0), | 2225 WASM_SET_GLOBAL(0, WASM_SIMD_F32x4_REPLACE_LANE(3, WASM_GET_GLOBAL(0), |
2215 WASM_F32(65.0))), | 2226 WASM_F32(65.0))), |
2216 WASM_I32V(1)); | 2227 WASM_I32V(1)); |
2217 CHECK_EQ(1, r.Call(0)); | 2228 CHECK_EQ(1, r.Call(0)); |
2218 CHECK_EQ(GetScalar(global, 0), 13.5f); | 2229 CHECK_EQ(GetScalar(global, 0), 13.5f); |
2219 CHECK_EQ(GetScalar(global, 1), 45.5f); | 2230 CHECK_EQ(GetScalar(global, 1), 45.5f); |
2220 CHECK_EQ(GetScalar(global, 2), 32.25f); | 2231 CHECK_EQ(GetScalar(global, 2), 32.25f); |
2221 CHECK_EQ(GetScalar(global, 3), 65.0f); | 2232 CHECK_EQ(GetScalar(global, 3), 65.0f); |
2222 } | 2233 } |
2223 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET | 2234 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || |
| 2235 // V8_TARGET_ARCH_MIPS64 |
2224 | 2236 |
2225 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 | 2237 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || \ |
| 2238 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
2226 WASM_SIMD_TEST(SimdLoadStoreLoad) { | 2239 WASM_SIMD_TEST(SimdLoadStoreLoad) { |
2227 WasmRunner<int32_t> r(kExecuteCompiled); | 2240 WasmRunner<int32_t> r(kExecuteCompiled); |
2228 int32_t* memory = r.module().AddMemoryElems<int32_t>(4); | 2241 int32_t* memory = r.module().AddMemoryElems<int32_t>(4); |
2229 | 2242 |
2230 BUILD(r, | 2243 BUILD(r, |
2231 WASM_STORE_MEM(MachineType::Simd128(), WASM_ZERO, | 2244 WASM_STORE_MEM(MachineType::Simd128(), WASM_ZERO, |
2232 WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO)), | 2245 WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO)), |
2233 WASM_SIMD_I32x4_EXTRACT_LANE( | 2246 WASM_SIMD_I32x4_EXTRACT_LANE( |
2234 0, WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO))); | 2247 0, WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO))); |
2235 | 2248 |
2236 FOR_INT32_INPUTS(i) { | 2249 FOR_INT32_INPUTS(i) { |
2237 int32_t expected = *i; | 2250 int32_t expected = *i; |
2238 r.module().WriteMemory(&memory[0], expected); | 2251 r.module().WriteMemory(&memory[0], expected); |
2239 CHECK_EQ(expected, r.Call()); | 2252 CHECK_EQ(expected, r.Call()); |
2240 } | 2253 } |
2241 } | 2254 } |
2242 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 | 2255 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 || |
| 2256 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
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