[WASM SIMD] Implement primitive shuffles.

src/compiler/machine-operator.cc

Index: src/compiler/machine-operator.cc
diff --git a/src/compiler/machine-operator.cc b/src/compiler/machine-operator.cc
index 2e66b17a9d771a7d2b065c99f928d9562c43f47a..95b37651ad5816f43d741ced1742e5d36a1d27d2 100644
--- a/src/compiler/machine-operator.cc
+++ b/src/compiler/machine-operator.cc
@@ -320,9 +320,33 @@ MachineType AtomicOpRepresentationOf(Operator const* op) {
   V(S128Or, Operator::kAssociative | Operator::kCommutative, 2, 0, 1)     \
   V(S128Xor, Operator::kAssociative | Operator::kCommutative, 2, 0, 1)    \
   V(S128Not, Operator::kNoProperties, 1, 0, 1)                            \
+  V(S32x4ZipLeft, Operator::kNoProperties, 2, 0, 1)                       \
+  V(S32x4ZipRight, Operator::kNoProperties, 2, 0, 1)                      \
+  V(S32x4UnzipLeft, Operator::kNoProperties, 2, 0, 1)                     \
+  V(S32x4UnzipRight, Operator::kNoProperties, 2, 0, 1)                    \
+  V(S32x4TransposeLeft, Operator::kNoProperties, 2, 0, 1)                 \
+  V(S32x4TransposeRight, Operator::kNoProperties, 2, 0, 1)                \
   V(S32x4Select, Operator::kNoProperties, 3, 0, 1)                        \
+  V(S16x8ZipLeft, Operator::kNoProperties, 2, 0, 1)                       \
+  V(S16x8ZipRight, Operator::kNoProperties, 2, 0, 1)                      \
+  V(S16x8UnzipLeft, Operator::kNoProperties, 2, 0, 1)                     \
+  V(S16x8UnzipRight, Operator::kNoProperties, 2, 0, 1)                    \
+  V(S16x8TransposeLeft, Operator::kNoProperties, 2, 0, 1)                 \
+  V(S16x8TransposeRight, Operator::kNoProperties, 2, 0, 1)                \
   V(S16x8Select, Operator::kNoProperties, 3, 0, 1)                        \
+  V(S8x16ZipLeft, Operator::kNoProperties, 2, 0, 1)                       \
+  V(S8x16ZipRight, Operator::kNoProperties, 2, 0, 1)                      \
+  V(S8x16UnzipLeft, Operator::kNoProperties, 2, 0, 1)                     \
+  V(S8x16UnzipRight, Operator::kNoProperties, 2, 0, 1)                    \
+  V(S8x16TransposeLeft, Operator::kNoProperties, 2, 0, 1)                 \
+  V(S8x16TransposeRight, Operator::kNoProperties, 2, 0, 1)                \
   V(S8x16Select, Operator::kNoProperties, 3, 0, 1)                        \
+  V(S32x2Reverse, Operator::kNoProperties, 1, 0, 1)                       \
+  V(S16x4Reverse, Operator::kNoProperties, 1, 0, 1)                       \
+  V(S16x2Reverse, Operator::kNoProperties, 1, 0, 1)                       \
+  V(S8x8Reverse, Operator::kNoProperties, 1, 0, 1)                        \
+  V(S8x4Reverse, Operator::kNoProperties, 1, 0, 1)                        \
+  V(S8x2Reverse, Operator::kNoProperties, 1, 0, 1)                        \
   V(S1x4Zero, Operator::kNoProperties, 0, 0, 1)                           \
   V(S1x4And, Operator::kAssociative | Operator::kCommutative, 2, 0, 1)    \
   V(S1x4Or, Operator::kAssociative | Operator::kCommutative, 2, 0, 1)     \
@@ -1007,16 +1031,11 @@ SIMD_LANE_OP_LIST(SIMD_LANE_OPS)
 SIMD_FORMAT_LIST(SIMD_SHIFT_OPS)
 #undef SIMD_SHIFT_OPS
 
-// TODO(bbudge) Add Shuffle, DCHECKs based on format.
-#define SIMD_PERMUTE_OPS(format, bits)                                      \
-  const Operator* MachineOperatorBuilder::S##format##Swizzle(               \
-      uint32_t swizzle) {                                                   \
-    return new (zone_)                                                      \
-        Operator1<uint32_t>(IrOpcode::kS##format##Swizzle, Operator::kPure, \
-                            "Swizzle", 2, 0, 0, 1, 0, 0, swizzle);          \
-  }
-SIMD_FORMAT_LIST(SIMD_PERMUTE_OPS)
-#undef SIMD_PERMUTE_OPS
+const Operator* MachineOperatorBuilder::S8x16Concat(int32_t bytes) {
+  DCHECK(0 <= bytes && bytes < kSimd128Size);
+  return new (zone_) Operator1<int32_t>(IrOpcode::kS8x16Concat, Operator::kPure,
+                                        "Concat", 2, 0, 0, 1, 0, 0, bytes);
+}
 
 }  // namespace compiler
 }  // namespace internal