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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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225 V(ArmI8x16MinU) \ | 225 V(ArmI8x16MinU) \ |
226 V(ArmI8x16MaxU) \ | 226 V(ArmI8x16MaxU) \ |
227 V(ArmI8x16LtU) \ | 227 V(ArmI8x16LtU) \ |
228 V(ArmI8x16LeU) \ | 228 V(ArmI8x16LeU) \ |
229 V(ArmS128Zero) \ | 229 V(ArmS128Zero) \ |
230 V(ArmS128And) \ | 230 V(ArmS128And) \ |
231 V(ArmS128Or) \ | 231 V(ArmS128Or) \ |
232 V(ArmS128Xor) \ | 232 V(ArmS128Xor) \ |
233 V(ArmS128Not) \ | 233 V(ArmS128Not) \ |
234 V(ArmS128Select) \ | 234 V(ArmS128Select) \ |
| 235 V(ArmS32x4ZipLeft) \ |
| 236 V(ArmS32x4ZipRight) \ |
| 237 V(ArmS32x4UnzipLeft) \ |
| 238 V(ArmS32x4UnzipRight) \ |
| 239 V(ArmS32x4TransposeLeft) \ |
| 240 V(ArmS32x4TransposeRight) \ |
| 241 V(ArmS16x8ZipLeft) \ |
| 242 V(ArmS16x8ZipRight) \ |
| 243 V(ArmS16x8UnzipLeft) \ |
| 244 V(ArmS16x8UnzipRight) \ |
| 245 V(ArmS16x8TransposeLeft) \ |
| 246 V(ArmS16x8TransposeRight) \ |
| 247 V(ArmS8x16ZipLeft) \ |
| 248 V(ArmS8x16ZipRight) \ |
| 249 V(ArmS8x16UnzipLeft) \ |
| 250 V(ArmS8x16UnzipRight) \ |
| 251 V(ArmS8x16TransposeLeft) \ |
| 252 V(ArmS8x16TransposeRight) \ |
| 253 V(ArmS8x16Concat) \ |
| 254 V(ArmS32x2Reverse) \ |
| 255 V(ArmS16x4Reverse) \ |
| 256 V(ArmS16x2Reverse) \ |
| 257 V(ArmS8x8Reverse) \ |
| 258 V(ArmS8x4Reverse) \ |
| 259 V(ArmS8x2Reverse) \ |
235 V(ArmS1x4AnyTrue) \ | 260 V(ArmS1x4AnyTrue) \ |
236 V(ArmS1x4AllTrue) \ | 261 V(ArmS1x4AllTrue) \ |
237 V(ArmS1x8AnyTrue) \ | 262 V(ArmS1x8AnyTrue) \ |
238 V(ArmS1x8AllTrue) \ | 263 V(ArmS1x8AllTrue) \ |
239 V(ArmS1x16AnyTrue) \ | 264 V(ArmS1x16AnyTrue) \ |
240 V(ArmS1x16AllTrue) | 265 V(ArmS1x16AllTrue) |
241 | 266 |
242 // Addressing modes represent the "shape" of inputs to an instruction. | 267 // Addressing modes represent the "shape" of inputs to an instruction. |
243 // Many instructions support multiple addressing modes. Addressing modes | 268 // Many instructions support multiple addressing modes. Addressing modes |
244 // are encoded into the InstructionCode of the instruction and tell the | 269 // are encoded into the InstructionCode of the instruction and tell the |
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255 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ | 280 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ |
256 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ | 281 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ |
257 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ | 282 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ |
258 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ | 283 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ |
259 | 284 |
260 } // namespace compiler | 285 } // namespace compiler |
261 } // namespace internal | 286 } // namespace internal |
262 } // namespace v8 | 287 } // namespace v8 |
263 | 288 |
264 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 289 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
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