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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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213 V(ArmI8x16MinU) \ | 213 V(ArmI8x16MinU) \ |
214 V(ArmI8x16MaxU) \ | 214 V(ArmI8x16MaxU) \ |
215 V(ArmI8x16LtU) \ | 215 V(ArmI8x16LtU) \ |
216 V(ArmI8x16LeU) \ | 216 V(ArmI8x16LeU) \ |
217 V(ArmS128Zero) \ | 217 V(ArmS128Zero) \ |
218 V(ArmS128And) \ | 218 V(ArmS128And) \ |
219 V(ArmS128Or) \ | 219 V(ArmS128Or) \ |
220 V(ArmS128Xor) \ | 220 V(ArmS128Xor) \ |
221 V(ArmS128Not) \ | 221 V(ArmS128Not) \ |
222 V(ArmS128Select) \ | 222 V(ArmS128Select) \ |
| 223 V(ArmS32x4ZipLeft) \ |
| 224 V(ArmS32x4ZipRight) \ |
| 225 V(ArmS32x4UnzipLeft) \ |
| 226 V(ArmS32x4UnzipRight) \ |
| 227 V(ArmS32x4TransposeLeft) \ |
| 228 V(ArmS32x4TransposeRight) \ |
| 229 V(ArmS16x8ZipLeft) \ |
| 230 V(ArmS16x8ZipRight) \ |
| 231 V(ArmS16x8UnzipLeft) \ |
| 232 V(ArmS16x8UnzipRight) \ |
| 233 V(ArmS16x8TransposeLeft) \ |
| 234 V(ArmS16x8TransposeRight) \ |
| 235 V(ArmS8x16ZipLeft) \ |
| 236 V(ArmS8x16ZipRight) \ |
| 237 V(ArmS8x16UnzipLeft) \ |
| 238 V(ArmS8x16UnzipRight) \ |
| 239 V(ArmS8x16TransposeLeft) \ |
| 240 V(ArmS8x16TransposeRight) \ |
| 241 V(ArmS8x16Concat) \ |
| 242 V(ArmS32x2Reverse) \ |
| 243 V(ArmS16x4Reverse) \ |
| 244 V(ArmS16x2Reverse) \ |
| 245 V(ArmS8x8Reverse) \ |
| 246 V(ArmS8x4Reverse) \ |
| 247 V(ArmS8x2Reverse) \ |
223 V(ArmS1x4AnyTrue) \ | 248 V(ArmS1x4AnyTrue) \ |
224 V(ArmS1x4AllTrue) \ | 249 V(ArmS1x4AllTrue) \ |
225 V(ArmS1x8AnyTrue) \ | 250 V(ArmS1x8AnyTrue) \ |
226 V(ArmS1x8AllTrue) \ | 251 V(ArmS1x8AllTrue) \ |
227 V(ArmS1x16AnyTrue) \ | 252 V(ArmS1x16AnyTrue) \ |
228 V(ArmS1x16AllTrue) | 253 V(ArmS1x16AllTrue) |
229 | 254 |
230 // Addressing modes represent the "shape" of inputs to an instruction. | 255 // Addressing modes represent the "shape" of inputs to an instruction. |
231 // Many instructions support multiple addressing modes. Addressing modes | 256 // Many instructions support multiple addressing modes. Addressing modes |
232 // are encoded into the InstructionCode of the instruction and tell the | 257 // are encoded into the InstructionCode of the instruction and tell the |
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243 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ | 268 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ |
244 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ | 269 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ |
245 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ | 270 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ |
246 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ | 271 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ |
247 | 272 |
248 } // namespace compiler | 273 } // namespace compiler |
249 } // namespace internal | 274 } // namespace internal |
250 } // namespace v8 | 275 } // namespace v8 |
251 | 276 |
252 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 277 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
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