[WASM SIMD] Implement packing and unpacking integer conversions.

src/compiler/arm/code-generator-arm.cc

Index: src/compiler/arm/code-generator-arm.cc
diff --git a/src/compiler/arm/code-generator-arm.cc b/src/compiler/arm/code-generator-arm.cc
index bd2a942bcc249df170989cde9bdde65cfc771ae8..de7f32d732764b585d31d9d99ca67465ee312938 100644
--- a/src/compiler/arm/code-generator-arm.cc
+++ b/src/compiler/arm/code-generator-arm.cc
@@ -1668,6 +1668,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vcvt_s32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
+    case kArmI32x4SConvertI16x8Low: {
+      __ vmovl(NeonS16, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).low());
+      break;
+    }
+    case kArmI32x4SConvertI16x8High: {
+      __ vmovl(NeonS16, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).high());
+      break;
+    }
     case kArmI32x4Neg: {
       __ vneg(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
@@ -1733,6 +1743,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vcvt_u32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
+    case kArmI32x4UConvertI16x8Low: {
+      __ vmovl(NeonU16, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).low());
+      break;
+    }
+    case kArmI32x4UConvertI16x8High: {
+      __ vmovl(NeonU16, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).high());
+      break;
+    }
     case kArmI32x4ShrU: {
       __ vshr(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt5(1));
@@ -1772,6 +1792,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
                      i.InputRegister(2), NeonS16, i.InputInt8(1));
       break;
     }
+    case kArmI16x8SConvertI8x16Low: {
+      __ vmovl(NeonS8, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).low());
+      break;
+    }
+    case kArmI16x8SConvertI8x16High: {
+      __ vmovl(NeonS8, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).high());
+      break;
+    }
     case kArmI16x8Neg: {
       __ vneg(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
@@ -1786,6 +1816,25 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               i.InputInt4(1));
       break;
     }
+    case kArmI16x8SConvertI32x4: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      src0 = i.InputSimd128Register(0),
+                      src1 = i.InputSimd128Register(1);
+      // Take care not to overwrite a source register before it's used.
+      if (dst.is(src0) && dst.is(src1)) {
+        __ vqmovn(NeonS16, dst.low(), src0);
+        __ vmov(dst.high(), dst.low());
+      } else if (dst.is(src0)) {
+        // dst is src0, so narrow src0 first.
+        __ vqmovn(NeonS16, dst.low(), src0);
+        __ vqmovn(NeonS16, dst.high(), src1);
+      } else {
+        // dst may alias src1, so narrow src1 first.
+        __ vqmovn(NeonS16, dst.high(), src1);
+        __ vqmovn(NeonS16, dst.low(), src0);
+      }
+      break;
+    }
     case kArmI16x8Add: {
       __ vadd(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));
@@ -1843,11 +1892,40 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               i.InputSimd128Register(0));
       break;
     }
+    case kArmI16x8UConvertI8x16Low: {
+      __ vmovl(NeonU8, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).low());
+      break;
+    }
+    case kArmI16x8UConvertI8x16High: {
+      __ vmovl(NeonU8, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).high());
+      break;
+    }
     case kArmI16x8ShrU: {
       __ vshr(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt4(1));
       break;
     }
+    case kArmI16x8UConvertI32x4: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      src0 = i.InputSimd128Register(0),
+                      src1 = i.InputSimd128Register(1);
+      // Take care not to overwrite a source register before it's used.
+      if (dst.is(src0) && dst.is(src1)) {
+        __ vqmovn(NeonU16, dst.low(), src0);
+        __ vmov(dst.high(), dst.low());
+      } else if (dst.is(src0)) {
+        // dst is src0, so narrow src0 first.
+        __ vqmovn(NeonU16, dst.low(), src0);
+        __ vqmovn(NeonU16, dst.high(), src1);
+      } else {
+        // dst may alias src1, so narrow src1 first.
+        __ vqmovn(NeonU16, dst.high(), src1);
+        __ vqmovn(NeonU16, dst.low(), src0);
+      }
+      break;
+    }
     case kArmI16x8AddSaturateU: {
       __ vqadd(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
                i.InputSimd128Register(1));
@@ -1906,6 +1984,25 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               i.InputInt3(1));
       break;
     }
+    case kArmI8x16SConvertI16x8: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      src0 = i.InputSimd128Register(0),
+                      src1 = i.InputSimd128Register(1);
+      // Take care not to overwrite a source register before it's used.
+      if (dst.is(src0) && dst.is(src1)) {
+        __ vqmovn(NeonS8, dst.low(), src0);
+        __ vmov(dst.high(), dst.low());
+      } else if (dst.is(src0)) {
+        // dst is src0, so narrow src0 first.
+        __ vqmovn(NeonS8, dst.low(), src0);
+        __ vqmovn(NeonS8, dst.high(), src1);
+      } else {
+        // dst may alias src1, so narrow src1 first.
+        __ vqmovn(NeonS8, dst.high(), src1);
+        __ vqmovn(NeonS8, dst.low(), src0);
+      }
+      break;
+    }
     case kArmI8x16Add: {
       __ vadd(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));
@@ -1967,6 +2064,25 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               i.InputInt3(1));
       break;
     }
+    case kArmI8x16UConvertI16x8: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      src0 = i.InputSimd128Register(0),
+                      src1 = i.InputSimd128Register(1);
+      // Take care not to overwrite a source register before it's used.
+      if (dst.is(src0) && dst.is(src1)) {
+        __ vqmovn(NeonU8, dst.low(), src0);
+        __ vmov(dst.high(), dst.low());
+      } else if (dst.is(src0)) {
+        // dst is src0, so narrow src0 first.
+        __ vqmovn(NeonU8, dst.low(), src0);
+        __ vqmovn(NeonU8, dst.high(), src1);
+      } else {
+        // dst may alias src1, so narrow src1 first.
+        __ vqmovn(NeonU8, dst.high(), src1);
+        __ vqmovn(NeonU8, dst.low(), src0);
+      }
+      break;
+    }
     case kArmI8x16AddSaturateU: {
       __ vqadd(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
                i.InputSimd128Register(1));