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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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5506 TEST(maddf_msubf_d) { | 5506 TEST(maddf_msubf_d) { |
5507 if (!IsMipsArchVariant(kMips32r6)) return; | 5507 if (!IsMipsArchVariant(kMips32r6)) return; |
5508 helper_madd_msub_maddf_msubf<double>([](MacroAssembler& assm) { | 5508 helper_madd_msub_maddf_msubf<double>([](MacroAssembler& assm) { |
5509 __ maddf_d(f4, f6, f8); | 5509 __ maddf_d(f4, f6, f8); |
5510 __ Sdc1(f4, MemOperand(a0, offsetof(TestCaseMaddMsub<double>, fd_add))); | 5510 __ Sdc1(f4, MemOperand(a0, offsetof(TestCaseMaddMsub<double>, fd_add))); |
5511 __ msubf_d(f16, f6, f8); | 5511 __ msubf_d(f16, f6, f8); |
5512 __ Sdc1(f16, MemOperand(a0, offsetof(TestCaseMaddMsub<double>, fd_sub))); | 5512 __ Sdc1(f16, MemOperand(a0, offsetof(TestCaseMaddMsub<double>, fd_sub))); |
5513 }); | 5513 }); |
5514 } | 5514 } |
5515 | 5515 |
| 5516 TEST(MSA_fill_copy) { |
| 5517 CcTest::InitializeVM(); |
| 5518 Isolate* isolate = CcTest::i_isolate(); |
| 5519 HandleScope scope(isolate); |
| 5520 |
| 5521 typedef struct { |
| 5522 uint32_t u8; |
| 5523 uint32_t u16; |
| 5524 uint32_t u32; |
| 5525 uint32_t s8; |
| 5526 uint32_t s16; |
| 5527 uint32_t s32; |
| 5528 } T; |
| 5529 T t; |
| 5530 |
| 5531 MacroAssembler assm(isolate, NULL, 0, v8::internal::CodeObjectRequired::kYes); |
| 5532 if (!IsMipsArchVariant(kMips32r6) || !CpuFeatures::IsSupported(MIPS_SIMD)) |
| 5533 return; |
| 5534 |
| 5535 { |
| 5536 CpuFeatureScope fscope(&assm, MIPS_SIMD); |
| 5537 |
| 5538 __ li(t0, 0xa512b683); |
| 5539 |
| 5540 __ fill_b(w0, t0); |
| 5541 __ fill_h(w2, t0); |
| 5542 __ fill_w(w4, t0); |
| 5543 __ copy_u_b(t1, w0, 11); |
| 5544 __ sw(t1, MemOperand(a0, offsetof(T, u8))); |
| 5545 __ copy_u_h(t1, w2, 6); |
| 5546 __ sw(t1, MemOperand(a0, offsetof(T, u16))); |
| 5547 __ copy_u_w(t1, w4, 3); |
| 5548 __ sw(t1, MemOperand(a0, offsetof(T, u32))); |
| 5549 |
| 5550 __ copy_s_b(t1, w0, 8); |
| 5551 __ sw(t1, MemOperand(a0, offsetof(T, s8))); |
| 5552 __ copy_s_h(t1, w2, 5); |
| 5553 __ sw(t1, MemOperand(a0, offsetof(T, s16))); |
| 5554 __ copy_s_w(t1, w4, 1); |
| 5555 __ sw(t1, MemOperand(a0, offsetof(T, s32))); |
| 5556 |
| 5557 __ jr(ra); |
| 5558 __ nop(); |
| 5559 } |
| 5560 |
| 5561 CodeDesc desc; |
| 5562 assm.GetCode(&desc); |
| 5563 Handle<Code> code = isolate->factory()->NewCode( |
| 5564 desc, Code::ComputeFlags(Code::STUB), Handle<Code>()); |
| 5565 #ifdef OBJECT_PRINT |
| 5566 code->Print(std::cout); |
| 5567 #endif |
| 5568 F1 f = FUNCTION_CAST<F1>(code->entry()); |
| 5569 |
| 5570 Object* dummy = CALL_GENERATED_CODE(isolate, f, &t, 0, 0, 0, 0); |
| 5571 USE(dummy); |
| 5572 |
| 5573 CHECK_EQ(0x83u, t.u8); |
| 5574 CHECK_EQ(0xb683u, t.u16); |
| 5575 CHECK_EQ(0xa512b683u, t.u32); |
| 5576 CHECK_EQ(0xffffff83u, t.s8); |
| 5577 CHECK_EQ(0xffffb683u, t.s16); |
| 5578 CHECK_EQ(0xa512b683u, t.s32); |
| 5579 } |
| 5580 |
5516 #undef __ | 5581 #undef __ |
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