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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 | 6 |
7 #include "src/arm64/assembler-arm64-inl.h" | 7 #include "src/arm64/assembler-arm64-inl.h" |
8 #include "src/arm64/frames-arm64.h" | 8 #include "src/arm64/frames-arm64.h" |
9 #include "src/arm64/macro-assembler-arm64-inl.h" | 9 #include "src/arm64/macro-assembler-arm64-inl.h" |
10 #include "src/compilation-info.h" | 10 #include "src/compilation-info.h" |
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549 __ Add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \ | 549 __ Add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \ |
550 __ load_instr(i.OutputRegister32(), i.TempRegister(0)); \ | 550 __ load_instr(i.OutputRegister32(), i.TempRegister(0)); \ |
551 __ cmp(i.TempRegister32(1), i.OutputRegister32()); \ | 551 __ cmp(i.TempRegister32(1), i.OutputRegister32()); \ |
552 __ B(ne, &exit); \ | 552 __ B(ne, &exit); \ |
553 __ store_instr(i.TempRegister32(0), i.InputRegister32(3), \ | 553 __ store_instr(i.TempRegister32(0), i.InputRegister32(3), \ |
554 i.TempRegister(0)); \ | 554 i.TempRegister(0)); \ |
555 __ cbnz(i.TempRegister32(0), &compareExchange); \ | 555 __ cbnz(i.TempRegister32(0), &compareExchange); \ |
556 __ bind(&exit); \ | 556 __ bind(&exit); \ |
557 } while (0) | 557 } while (0) |
558 | 558 |
| 559 #define ASSEMBLE_ATOMIC_BINOP(load_instr, store_instr, bin_instr) \ |
| 560 do { \ |
| 561 Label binop; \ |
| 562 __ Add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \ |
| 563 __ bind(&binop); \ |
| 564 __ load_instr(i.OutputRegister32(), i.TempRegister(0)); \ |
| 565 __ bin_instr(i.TempRegister32(1), i.OutputRegister32(), \ |
| 566 Operand(i.InputRegister32(2))); \ |
| 567 __ store_instr(i.TempRegister32(1), i.TempRegister32(1), \ |
| 568 i.TempRegister(0)); \ |
| 569 __ cbnz(i.TempRegister32(1), &binop); \ |
| 570 } while (0) |
| 571 |
559 #define ASSEMBLE_IEEE754_BINOP(name) \ | 572 #define ASSEMBLE_IEEE754_BINOP(name) \ |
560 do { \ | 573 do { \ |
561 FrameScope scope(masm(), StackFrame::MANUAL); \ | 574 FrameScope scope(masm(), StackFrame::MANUAL); \ |
562 __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \ | 575 __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \ |
563 0, 2); \ | 576 0, 2); \ |
564 } while (0) | 577 } while (0) |
565 | 578 |
566 #define ASSEMBLE_IEEE754_UNOP(name) \ | 579 #define ASSEMBLE_IEEE754_UNOP(name) \ |
567 do { \ | 580 do { \ |
568 FrameScope scope(masm(), StackFrame::MANUAL); \ | 581 FrameScope scope(masm(), StackFrame::MANUAL); \ |
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1689 __ Sxth(i.OutputRegister(0), i.OutputRegister(0)); | 1702 __ Sxth(i.OutputRegister(0), i.OutputRegister(0)); |
1690 break; | 1703 break; |
1691 case kAtomicCompareExchangeUint16: | 1704 case kAtomicCompareExchangeUint16: |
1692 __ Uxth(i.TempRegister(1), i.InputRegister(2)); | 1705 __ Uxth(i.TempRegister(1), i.InputRegister(2)); |
1693 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrh, stlxrh); | 1706 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrh, stlxrh); |
1694 break; | 1707 break; |
1695 case kAtomicCompareExchangeWord32: | 1708 case kAtomicCompareExchangeWord32: |
1696 __ mov(i.TempRegister(1), i.InputRegister(2)); | 1709 __ mov(i.TempRegister(1), i.InputRegister(2)); |
1697 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxr, stlxr); | 1710 ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxr, stlxr); |
1698 break; | 1711 break; |
| 1712 #define ATOMIC_BINOP_CASE(op, inst) \ |
| 1713 case kAtomic##op##Int8: \ |
| 1714 ASSEMBLE_ATOMIC_BINOP(ldaxrb, stlxrb, inst); \ |
| 1715 __ Sxtb(i.OutputRegister(0), i.OutputRegister(0)); \ |
| 1716 break; \ |
| 1717 case kAtomic##op##Uint8: \ |
| 1718 ASSEMBLE_ATOMIC_BINOP(ldaxrb, stlxrb, inst); \ |
| 1719 break; \ |
| 1720 case kAtomic##op##Int16: \ |
| 1721 ASSEMBLE_ATOMIC_BINOP(ldaxrh, stlxrh, inst); \ |
| 1722 __ Sxth(i.OutputRegister(0), i.OutputRegister(0)); \ |
| 1723 break; \ |
| 1724 case kAtomic##op##Uint16: \ |
| 1725 ASSEMBLE_ATOMIC_BINOP(ldaxrh, stlxrh, inst); \ |
| 1726 break; \ |
| 1727 case kAtomic##op##Word32: \ |
| 1728 ASSEMBLE_ATOMIC_BINOP(ldaxr, stlxr, inst); \ |
| 1729 break; |
| 1730 ATOMIC_BINOP_CASE(Add, Add) |
| 1731 ATOMIC_BINOP_CASE(Sub, Sub) |
| 1732 ATOMIC_BINOP_CASE(And, And) |
| 1733 ATOMIC_BINOP_CASE(Or, Orr) |
| 1734 ATOMIC_BINOP_CASE(Xor, Eor) |
| 1735 #undef ATOMIC_BINOP_CASE |
1699 } | 1736 } |
1700 return kSuccess; | 1737 return kSuccess; |
1701 } // NOLINT(readability/fn_size) | 1738 } // NOLINT(readability/fn_size) |
1702 | 1739 |
1703 | 1740 |
1704 // Assemble branches after this instruction. | 1741 // Assemble branches after this instruction. |
1705 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) { | 1742 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) { |
1706 Arm64OperandConverter i(this, instr); | 1743 Arm64OperandConverter i(this, instr); |
1707 Label* tlabel = branch->true_label; | 1744 Label* tlabel = branch->true_label; |
1708 Label* flabel = branch->false_label; | 1745 Label* flabel = branch->false_label; |
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2245 padding_size -= kInstructionSize; | 2282 padding_size -= kInstructionSize; |
2246 } | 2283 } |
2247 } | 2284 } |
2248 } | 2285 } |
2249 | 2286 |
2250 #undef __ | 2287 #undef __ |
2251 | 2288 |
2252 } // namespace compiler | 2289 } // namespace compiler |
2253 } // namespace internal | 2290 } // namespace internal |
2254 } // namespace v8 | 2291 } // namespace v8 |
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