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Side by Side Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 2799863002: [Atomics] use TFJ builtins for atomic add, sub, and, or, and xor (Closed)
Patch Set: [Atomics] use TFJ builtins for atomic add, sub, and, or, and xor Created 3 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 2216 matching lines...) Expand 10 before | Expand all | Expand 10 after
2227 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); 2227 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
2228 Emit(code, 0, nullptr, input_count, inputs); 2228 Emit(code, 0, nullptr, input_count, inputs);
2229 } 2229 }
2230 2230
2231 void InstructionSelector::VisitAtomicExchange(Node* node) { 2231 void InstructionSelector::VisitAtomicExchange(Node* node) {
2232 ArmOperandGenerator g(this); 2232 ArmOperandGenerator g(this);
2233 Node* base = node->InputAt(0); 2233 Node* base = node->InputAt(0);
2234 Node* index = node->InputAt(1); 2234 Node* index = node->InputAt(1);
2235 Node* value = node->InputAt(2); 2235 Node* value = node->InputAt(2);
2236 ArchOpcode opcode = kArchNop; 2236 ArchOpcode opcode = kArchNop;
2237 MachineType type = AtomicExchangeRepresentationOf(node->op()); 2237 MachineType type = AtomicOpRepresentationOf(node->op());
2238 if (type == MachineType::Int8()) { 2238 if (type == MachineType::Int8()) {
2239 opcode = kAtomicExchangeInt8; 2239 opcode = kAtomicExchangeInt8;
2240 } else if (type == MachineType::Uint8()) { 2240 } else if (type == MachineType::Uint8()) {
2241 opcode = kAtomicExchangeUint8; 2241 opcode = kAtomicExchangeUint8;
2242 } else if (type == MachineType::Int16()) { 2242 } else if (type == MachineType::Int16()) {
2243 opcode = kAtomicExchangeInt16; 2243 opcode = kAtomicExchangeInt16;
2244 } else if (type == MachineType::Uint16()) { 2244 } else if (type == MachineType::Uint16()) {
2245 opcode = kAtomicExchangeUint16; 2245 opcode = kAtomicExchangeUint16;
2246 } else if (type == MachineType::Int32() || type == MachineType::Uint32()) { 2246 } else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
2247 opcode = kAtomicExchangeWord32; 2247 opcode = kAtomicExchangeWord32;
(...skipping 16 matching lines...) Expand all
2264 Emit(code, 1, outputs, input_count, inputs, 1, temp); 2264 Emit(code, 1, outputs, input_count, inputs, 1, temp);
2265 } 2265 }
2266 2266
2267 void InstructionSelector::VisitAtomicCompareExchange(Node* node) { 2267 void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
2268 ArmOperandGenerator g(this); 2268 ArmOperandGenerator g(this);
2269 Node* base = node->InputAt(0); 2269 Node* base = node->InputAt(0);
2270 Node* index = node->InputAt(1); 2270 Node* index = node->InputAt(1);
2271 Node* old_value = node->InputAt(2); 2271 Node* old_value = node->InputAt(2);
2272 Node* new_value = node->InputAt(3); 2272 Node* new_value = node->InputAt(3);
2273 ArchOpcode opcode = kArchNop; 2273 ArchOpcode opcode = kArchNop;
2274 MachineType type = AtomicCompareExchangeRepresentationOf(node->op()); 2274 MachineType type = AtomicOpRepresentationOf(node->op());
2275 if (type == MachineType::Int8()) { 2275 if (type == MachineType::Int8()) {
2276 opcode = kAtomicCompareExchangeInt8; 2276 opcode = kAtomicCompareExchangeInt8;
2277 } else if (type == MachineType::Uint8()) { 2277 } else if (type == MachineType::Uint8()) {
2278 opcode = kAtomicCompareExchangeUint8; 2278 opcode = kAtomicCompareExchangeUint8;
2279 } else if (type == MachineType::Int16()) { 2279 } else if (type == MachineType::Int16()) {
2280 opcode = kAtomicCompareExchangeInt16; 2280 opcode = kAtomicCompareExchangeInt16;
2281 } else if (type == MachineType::Uint16()) { 2281 } else if (type == MachineType::Uint16()) {
2282 opcode = kAtomicCompareExchangeUint16; 2282 opcode = kAtomicCompareExchangeUint16;
2283 } else if (type == MachineType::Int32() || type == MachineType::Uint32()) { 2283 } else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
2284 opcode = kAtomicCompareExchangeWord32; 2284 opcode = kAtomicCompareExchangeWord32;
(...skipping 11 matching lines...) Expand all
2296 inputs[input_count++] = g.UseUniqueRegister(new_value); 2296 inputs[input_count++] = g.UseUniqueRegister(new_value);
2297 InstructionOperand outputs[1]; 2297 InstructionOperand outputs[1];
2298 outputs[0] = g.UseUniqueRegister(node); 2298 outputs[0] = g.UseUniqueRegister(node);
2299 InstructionOperand temp[2]; 2299 InstructionOperand temp[2];
2300 temp[0] = g.TempRegister(); 2300 temp[0] = g.TempRegister();
2301 temp[1] = g.TempRegister(); 2301 temp[1] = g.TempRegister();
2302 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); 2302 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
2303 Emit(code, 1, outputs, input_count, inputs, 2, temp); 2303 Emit(code, 1, outputs, input_count, inputs, 2, temp);
2304 } 2304 }
2305 2305
2306 void InstructionSelector::VisitAtomicBinaryOperation(
2307 Node* node, ArchOpcode int8_op, ArchOpcode uint8_op, ArchOpcode int16_op,
2308 ArchOpcode uint16_op, ArchOpcode word32_op) {
2309 ArmOperandGenerator g(this);
2310 Node* base = node->InputAt(0);
2311 Node* index = node->InputAt(1);
2312 Node* value = node->InputAt(2);
2313 ArchOpcode opcode = kArchNop;
2314 MachineType type = AtomicOpRepresentationOf(node->op());
2315 if (type == MachineType::Int8()) {
2316 opcode = int8_op;
2317 } else if (type == MachineType::Uint8()) {
2318 opcode = uint8_op;
2319 } else if (type == MachineType::Int16()) {
2320 opcode = int16_op;
2321 } else if (type == MachineType::Uint16()) {
2322 opcode = uint16_op;
2323 } else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
2324 opcode = word32_op;
2325 } else {
2326 UNREACHABLE();
2327 return;
2328 }
2329
2330 AddressingMode addressing_mode = kMode_Offset_RR;
2331 InstructionOperand inputs[3];
2332 size_t input_count = 0;
2333 inputs[input_count++] = g.UseUniqueRegister(base);
2334 inputs[input_count++] = g.UseUniqueRegister(index);
2335 inputs[input_count++] = g.UseUniqueRegister(value);
2336 InstructionOperand outputs[1];
2337 outputs[0] = g.UseUniqueRegister(node);
2338 InstructionOperand temps[2];
2339 temps[0] = g.TempRegister();
2340 temps[1] = g.TempRegister();
2341 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
2342 Emit(code, 1, outputs, input_count, inputs, 2, temps);
2343 }
2344
2345 #define VISIT_ATOMIC_BINOP(op) \
2346 void InstructionSelector::VisitAtomic##op(Node* node) { \
2347 VisitAtomicBinaryOperation(node, kAtomic##op##Int8, kAtomic##op##Uint8, \
2348 kAtomic##op##Int16, kAtomic##op##Uint16, \
2349 kAtomic##op##Word32); \
2350 }
2351 VISIT_ATOMIC_BINOP(Add)
2352 VISIT_ATOMIC_BINOP(Sub)
2353 VISIT_ATOMIC_BINOP(And)
2354 VISIT_ATOMIC_BINOP(Or)
2355 VISIT_ATOMIC_BINOP(Xor)
2356 #undef VISIT_ATOMIC_BINOP
2357
2306 #define SIMD_TYPE_LIST(V) \ 2358 #define SIMD_TYPE_LIST(V) \
2307 V(F32x4) \ 2359 V(F32x4) \
2308 V(I32x4) \ 2360 V(I32x4) \
2309 V(I16x8) \ 2361 V(I16x8) \
2310 V(I8x16) 2362 V(I8x16)
2311 2363
2312 #define SIMD_FORMAT_LIST(V) \ 2364 #define SIMD_FORMAT_LIST(V) \
2313 V(32x4) \ 2365 V(32x4) \
2314 V(16x8) \ 2366 V(16x8) \
2315 V(8x16) 2367 V(8x16)
(...skipping 208 matching lines...) Expand 10 before | Expand all | Expand 10 after
2524 Vector<MachineType> req_aligned = Vector<MachineType>::New(2); 2576 Vector<MachineType> req_aligned = Vector<MachineType>::New(2);
2525 req_aligned[0] = MachineType::Float32(); 2577 req_aligned[0] = MachineType::Float32();
2526 req_aligned[1] = MachineType::Float64(); 2578 req_aligned[1] = MachineType::Float64();
2527 return MachineOperatorBuilder::AlignmentRequirements:: 2579 return MachineOperatorBuilder::AlignmentRequirements::
2528 SomeUnalignedAccessUnsupported(req_aligned, req_aligned); 2580 SomeUnalignedAccessUnsupported(req_aligned, req_aligned);
2529 } 2581 }
2530 2582
2531 } // namespace compiler 2583 } // namespace compiler
2532 } // namespace internal 2584 } // namespace internal
2533 } // namespace v8 2585 } // namespace v8
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