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Issue 2798853003: MIPS[64]: Support for some SIMD operations (7) (Closed)
Patch Set: Rebase, change Lt/Le with Gt/Ge Created 3 years, 7 months ago
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1 // Copyright 2016 the V8 project authors. All rights reserved. 1 // Copyright 2016 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/assembler-inl.h" 5 #include "src/assembler-inl.h"
6 #include "test/cctest/cctest.h" 6 #include "test/cctest/cctest.h"
7 #include "test/cctest/compiler/value-helper.h" 7 #include "test/cctest/compiler/value-helper.h"
8 #include "test/cctest/wasm/wasm-run-utils.h" 8 #include "test/cctest/wasm/wasm-run-utils.h"
9 #include "test/common/wasm/wasm-macro-gen.h" 9 #include "test/common/wasm/wasm-macro-gen.h"
10 10
(...skipping 991 matching lines...) Expand 10 before | Expand all | Expand 10 after
1002 } 1002 }
1003 } 1003 }
1004 1004
1005 WASM_EXEC_COMPILED_TEST(I32x4Add) { RunI32x4BinOpTest(kExprI32x4Add, Add); } 1005 WASM_EXEC_COMPILED_TEST(I32x4Add) { RunI32x4BinOpTest(kExprI32x4Add, Add); }
1006 1006
1007 WASM_EXEC_COMPILED_TEST(I32x4Sub) { RunI32x4BinOpTest(kExprI32x4Sub, Sub); } 1007 WASM_EXEC_COMPILED_TEST(I32x4Sub) { RunI32x4BinOpTest(kExprI32x4Sub, Sub); }
1008 1008
1009 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET || \ 1009 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET || \
1010 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 1010 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1011 WASM_EXEC_COMPILED_TEST(I32x4Mul) { RunI32x4BinOpTest(kExprI32x4Mul, Mul); } 1011 WASM_EXEC_COMPILED_TEST(I32x4Mul) { RunI32x4BinOpTest(kExprI32x4Mul, Mul); }
1012 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET ||
1013 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1014 1012
1015 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64
1016 WASM_EXEC_COMPILED_TEST(S128And) { RunI32x4BinOpTest(kExprS128And, And); } 1013 WASM_EXEC_COMPILED_TEST(S128And) { RunI32x4BinOpTest(kExprS128And, And); }
1017 1014
1018 WASM_EXEC_COMPILED_TEST(S128Or) { RunI32x4BinOpTest(kExprS128Or, Or); } 1015 WASM_EXEC_COMPILED_TEST(S128Or) { RunI32x4BinOpTest(kExprS128Or, Or); }
1019 1016
1020 WASM_EXEC_COMPILED_TEST(S128Xor) { RunI32x4BinOpTest(kExprS128Xor, Xor); } 1017 WASM_EXEC_COMPILED_TEST(S128Xor) { RunI32x4BinOpTest(kExprS128Xor, Xor); }
1021 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64
1022 1018
1023 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET || \
1024 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1025 WASM_EXEC_COMPILED_TEST(I32x4Min) { 1019 WASM_EXEC_COMPILED_TEST(I32x4Min) {
1026 RunI32x4BinOpTest(kExprI32x4MinS, Minimum); 1020 RunI32x4BinOpTest(kExprI32x4MinS, Minimum);
1027 } 1021 }
1028 1022
1029 WASM_EXEC_COMPILED_TEST(I32x4MaxS) { 1023 WASM_EXEC_COMPILED_TEST(I32x4MaxS) {
1030 RunI32x4BinOpTest(kExprI32x4MaxS, Maximum); 1024 RunI32x4BinOpTest(kExprI32x4MaxS, Maximum);
1031 } 1025 }
1032 1026
1033 WASM_EXEC_COMPILED_TEST(I32x4MinU) { 1027 WASM_EXEC_COMPILED_TEST(I32x4MinU) {
1034 RunI32x4BinOpTest(kExprI32x4MinU, UnsignedMinimum); 1028 RunI32x4BinOpTest(kExprI32x4MinU, UnsignedMinimum);
(...skipping 378 matching lines...) Expand 10 before | Expand all | Expand 10 after
1413 FOR_INT16_INPUTS(i) { 1407 FOR_INT16_INPUTS(i) {
1414 int32_t packed_signed = Narrow<int8_t>(*i); 1408 int32_t packed_signed = Narrow<int8_t>(*i);
1415 int32_t packed_unsigned = UnsignedNarrow<int8_t>(*i); 1409 int32_t packed_unsigned = UnsignedNarrow<int8_t>(*i);
1416 // Sign-extend here, since ExtractLane sign extends. 1410 // Sign-extend here, since ExtractLane sign extends.
1417 if (packed_unsigned & 0x80) packed_unsigned |= 0xffffff00; 1411 if (packed_unsigned & 0x80) packed_unsigned |= 0xffffff00;
1418 CHECK_EQ(1, r.Call(*i, packed_signed, packed_unsigned)); 1412 CHECK_EQ(1, r.Call(*i, packed_signed, packed_unsigned));
1419 } 1413 }
1420 } 1414 }
1421 #endif // V8_TARGET_ARCH_ARM 1415 #endif // V8_TARGET_ARCH_ARM
1422 1416
1423 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET 1417 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET || \
1418 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1424 void RunI8x16BinOpTest(WasmOpcode simd_op, Int8BinOp expected_op) { 1419 void RunI8x16BinOpTest(WasmOpcode simd_op, Int8BinOp expected_op) {
1425 FLAG_wasm_simd_prototype = true; 1420 FLAG_wasm_simd_prototype = true;
1426 WasmRunner<int32_t, int32_t, int32_t, int32_t> r(kExecuteCompiled); 1421 WasmRunner<int32_t, int32_t, int32_t, int32_t> r(kExecuteCompiled);
1427 byte a = 0; 1422 byte a = 0;
1428 byte b = 1; 1423 byte b = 1;
1429 byte expected = 2; 1424 byte expected = 2;
1430 byte simd0 = r.AllocateLocal(kWasmS128); 1425 byte simd0 = r.AllocateLocal(kWasmS128);
1431 byte simd1 = r.AllocateLocal(kWasmS128); 1426 byte simd1 = r.AllocateLocal(kWasmS128);
1432 BUILD(r, WASM_SET_LOCAL(simd0, WASM_SIMD_I8x16_SPLAT(WASM_GET_LOCAL(a))), 1427 BUILD(r, WASM_SET_LOCAL(simd0, WASM_SIMD_I8x16_SPLAT(WASM_GET_LOCAL(a))),
1433 WASM_SET_LOCAL(simd1, WASM_SIMD_I8x16_SPLAT(WASM_GET_LOCAL(b))), 1428 WASM_SET_LOCAL(simd1, WASM_SIMD_I8x16_SPLAT(WASM_GET_LOCAL(b))),
(...skipping 61 matching lines...) Expand 10 before | Expand all | Expand 10 after
1495 FOR_INT8_INPUTS(i) { 1490 FOR_INT8_INPUTS(i) {
1496 FOR_INT8_INPUTS(j) { CHECK_EQ(1, r.Call(*i, *j, expected_op(*i, *j))); } 1491 FOR_INT8_INPUTS(j) { CHECK_EQ(1, r.Call(*i, *j, expected_op(*i, *j))); }
1497 } 1492 }
1498 } 1493 }
1499 1494
1500 WASM_EXEC_COMPILED_TEST(I8x16Eq) { RunI8x16CompareOpTest(kExprI8x16Eq, Equal); } 1495 WASM_EXEC_COMPILED_TEST(I8x16Eq) { RunI8x16CompareOpTest(kExprI8x16Eq, Equal); }
1501 1496
1502 WASM_EXEC_COMPILED_TEST(I8x16Ne) { 1497 WASM_EXEC_COMPILED_TEST(I8x16Ne) {
1503 RunI8x16CompareOpTest(kExprI8x16Ne, NotEqual); 1498 RunI8x16CompareOpTest(kExprI8x16Ne, NotEqual);
1504 } 1499 }
1505 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET 1500 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET ||
1501 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1506 1502
1507 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET 1503 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || \
1504 V8_TARGET_ARCH_MIPS64
1508 WASM_EXEC_COMPILED_TEST(I8x16Mul) { RunI8x16BinOpTest(kExprI8x16Mul, Mul); } 1505 WASM_EXEC_COMPILED_TEST(I8x16Mul) { RunI8x16BinOpTest(kExprI8x16Mul, Mul); }
1509 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 1506 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_MIPS ||
1507 // V8_TARGET_ARCH_MIPS64
1510 1508
1511 // TODO(gdeepti): Remove special case for ARM64 after v8:6421 is fixed 1509 // TODO(gdeepti): Remove special case for ARM64 after v8:6421 is fixed
1512 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET && !V8_TARGET_ARCH_ARM64 1510 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET && !V8_TARGET_ARCH_ARM64 || \
1511 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1513 WASM_EXEC_COMPILED_TEST(I8x16GtS) { 1512 WASM_EXEC_COMPILED_TEST(I8x16GtS) {
1514 RunI8x16CompareOpTest(kExprI8x16GtS, Greater); 1513 RunI8x16CompareOpTest(kExprI8x16GtS, Greater);
1515 } 1514 }
1516 1515
1517 WASM_EXEC_COMPILED_TEST(I8x16GeS) { 1516 WASM_EXEC_COMPILED_TEST(I8x16GeS) {
1518 RunI8x16CompareOpTest(kExprI8x16GeS, GreaterEqual); 1517 RunI8x16CompareOpTest(kExprI8x16GeS, GreaterEqual);
1519 } 1518 }
1520 1519
1521 WASM_EXEC_COMPILED_TEST(I8x16LtS) { 1520 WASM_EXEC_COMPILED_TEST(I8x16LtS) {
1522 RunI8x16CompareOpTest(kExprI8x16LtS, Less); 1521 RunI8x16CompareOpTest(kExprI8x16LtS, Less);
(...skipping 12 matching lines...) Expand all
1535 } 1534 }
1536 1535
1537 WASM_EXEC_COMPILED_TEST(I8x16LtU) { 1536 WASM_EXEC_COMPILED_TEST(I8x16LtU) {
1538 RunI8x16CompareOpTest(kExprI8x16LtU, UnsignedLess); 1537 RunI8x16CompareOpTest(kExprI8x16LtU, UnsignedLess);
1539 } 1538 }
1540 1539
1541 WASM_EXEC_COMPILED_TEST(I8x16LeU) { 1540 WASM_EXEC_COMPILED_TEST(I8x16LeU) {
1542 RunI8x16CompareOpTest(kExprI8x16LeU, UnsignedLessEqual); 1541 RunI8x16CompareOpTest(kExprI8x16LeU, UnsignedLessEqual);
1543 } 1542 }
1544 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET && !V8_TARGET_ARCH_ARM64 1543 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET && !V8_TARGET_ARCH_ARM64
1544 // || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1545 1545
1546 void RunI8x16ShiftOpTest(WasmOpcode simd_op, Int8ShiftOp expected_op, 1546 void RunI8x16ShiftOpTest(WasmOpcode simd_op, Int8ShiftOp expected_op,
1547 int shift) { 1547 int shift) {
1548 FLAG_wasm_simd_prototype = true; 1548 FLAG_wasm_simd_prototype = true;
1549 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); 1549 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled);
1550 byte a = 0; 1550 byte a = 0;
1551 byte expected = 1; 1551 byte expected = 1;
1552 byte simd = r.AllocateLocal(kWasmS128); 1552 byte simd = r.AllocateLocal(kWasmS128);
1553 BUILD(r, WASM_SET_LOCAL(simd, WASM_SIMD_I8x16_SPLAT(WASM_GET_LOCAL(a))), 1553 BUILD(r, WASM_SET_LOCAL(simd, WASM_SIMD_I8x16_SPLAT(WASM_GET_LOCAL(a))),
1554 WASM_SET_LOCAL( 1554 WASM_SET_LOCAL(
1555 simd, WASM_SIMD_SHIFT_OP(simd_op, shift, WASM_GET_LOCAL(simd))), 1555 simd, WASM_SIMD_SHIFT_OP(simd_op, shift, WASM_GET_LOCAL(simd))),
1556 WASM_SIMD_CHECK_SPLAT16(I8x16, simd, I32, expected), WASM_ONE); 1556 WASM_SIMD_CHECK_SPLAT16(I8x16, simd, I32, expected), WASM_ONE);
1557 1557
1558 FOR_INT8_INPUTS(i) { CHECK_EQ(1, r.Call(*i, expected_op(*i, shift))); } 1558 FOR_INT8_INPUTS(i) { CHECK_EQ(1, r.Call(*i, expected_op(*i, shift))); }
1559 } 1559 }
1560 1560
1561 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 || \ 1561 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 || \
1562 SIMD_LOWERING_TARGET 1562 SIMD_LOWERING_TARGET
1563 WASM_EXEC_COMPILED_TEST(I8x16Shl) { 1563 WASM_EXEC_COMPILED_TEST(I8x16Shl) {
1564 RunI8x16ShiftOpTest(kExprI8x16Shl, LogicalShiftLeft, 1); 1564 RunI8x16ShiftOpTest(kExprI8x16Shl, LogicalShiftLeft, 1);
1565 } 1565 }
1566 1566
1567 WASM_EXEC_COMPILED_TEST(I8x16ShrS) { 1567 WASM_EXEC_COMPILED_TEST(I8x16ShrS) {
1568 RunI8x16ShiftOpTest(kExprI8x16ShrS, ArithmeticShiftRight, 1); 1568 RunI8x16ShiftOpTest(kExprI8x16ShrS, ArithmeticShiftRight, 1);
1569 } 1569 }
1570 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 || 1570 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 ||
1571 // SIMD_LOWERING_TARGET 1571 // SIMD_LOWERING_TARGET
1572 1572
1573 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET 1573 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || \
1574 V8_TARGET_ARCH_MIPS64
1574 WASM_EXEC_COMPILED_TEST(I8x16ShrU) { 1575 WASM_EXEC_COMPILED_TEST(I8x16ShrU) {
1575 RunI8x16ShiftOpTest(kExprI8x16ShrU, LogicalShiftRight, 1); 1576 RunI8x16ShiftOpTest(kExprI8x16ShrU, LogicalShiftRight, 1);
1576 } 1577 }
1577 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET 1578 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS ||
1579 // V8_TARGET_ARCH_MIPS64
1578 1580
1579 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_MIPS || \ 1581 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_MIPS || \
1580 V8_TARGET_ARCH_MIPS64 1582 V8_TARGET_ARCH_MIPS64
1581 // Test Select by making a mask where the first two lanes are true and the rest 1583 // Test Select by making a mask where the first two lanes are true and the rest
1582 // false, and comparing for non-equality with zero to materialize a bool vector. 1584 // false, and comparing for non-equality with zero to materialize a bool vector.
1583 #define WASM_SIMD_SELECT_TEST(format) \ 1585 #define WASM_SIMD_SELECT_TEST(format) \
1584 WASM_EXEC_COMPILED_TEST(S##format##Select) { \ 1586 WASM_EXEC_COMPILED_TEST(S##format##Select) { \
1585 FLAG_wasm_simd_prototype = true; \ 1587 FLAG_wasm_simd_prototype = true; \
1586 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); \ 1588 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); \
1587 byte val1 = 0; \ 1589 byte val1 = 0; \
(...skipping 752 matching lines...) Expand 10 before | Expand all | Expand 10 after
2340 WASM_SIMD_I32x4_EXTRACT_LANE( 2342 WASM_SIMD_I32x4_EXTRACT_LANE(
2341 0, WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO))); 2343 0, WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO)));
2342 2344
2343 FOR_INT32_INPUTS(i) { 2345 FOR_INT32_INPUTS(i) {
2344 int32_t expected = *i; 2346 int32_t expected = *i;
2345 r.module().WriteMemory(&memory[0], expected); 2347 r.module().WriteMemory(&memory[0], expected);
2346 CHECK_EQ(expected, r.Call()); 2348 CHECK_EQ(expected, r.Call());
2347 } 2349 }
2348 } 2350 }
2349 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64 2351 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET || V8_TARGET_ARCH_X64
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