[ARM] Implement D-register versions of vzip, vuzp, and vtrn.

test/cctest/test-disasm-arm.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1124 matching lines @@
       COMPARE(vcgt(NeonU16, q1, q2, q8),
               "f3142360       vcgt.u16 q1, q2, q8");
       COMPARE(vcgt(NeonS32, q15, q0, q8),
               "f260e360       vcgt.s32 q15, q0, q8");
       COMPARE(vbsl(q0, q1, q2),
               "f3120154       vbsl q0, q1, q2");
       COMPARE(vbsl(q15, q0, q8),
               "f350e170       vbsl q15, q0, q8");
       COMPARE(vext(q15, q0, q8, 3),
               "f2f0e360       vext.8 q15, q0, q8, #3");
+      COMPARE(vzip(Neon16, d15, d0),
+              "f3b6f180       vzip.16 d15, d0");
       COMPARE(vzip(Neon16, q15, q0),
               "f3f6e1c0       vzip.16 q15, q0");
+      COMPARE(vuzp(Neon16, d15, d0),
+              "f3b6f100       vuzp.16 d15, d0");
       COMPARE(vuzp(Neon16, q15, q0),
               "f3f6e140       vuzp.16 q15, q0");
       COMPARE(vrev64(Neon8, q15, q0),
               "f3f0e040       vrev64.8 q15, q0");
+      COMPARE(vtrn(Neon16, d15, d0),
+              "f3b6f080       vtrn.16 d15, d0");
       COMPARE(vtrn(Neon16, q15, q0),
               "f3f6e0c0       vtrn.16 q15, q0");
       COMPARE(vtbl(d0, NeonListOperand(d1, 1), d2),
               "f3b10802       vtbl.8 d0, {d1}, d2");
       COMPARE(vtbl(d31, NeonListOperand(d0, 2), d4),
               "f3f0f904       vtbl.8 d31, {d0, d1}, d4");
       COMPARE(vtbl(d15, NeonListOperand(d1, 3), d5),
               "f3b1fa05       vtbl.8 d15, {d1, d2, d3}, d5");
       COMPARE(vtbl(d15, NeonListOperand(d1, 4), d5),
               "f3b1fb05       vtbl.8 d15, {d1, d2, d3, d4}, d5");
@@ skipping 288 matching lines @@
 
   COMPARE(ldrexb(r0, r1), "e1d10f9f       ldrexb r0, [r1]");
   COMPARE(strexb(r0, r1, r2), "e1c20f91       strexb r0, r1, [r2]");
   COMPARE(ldrexh(r0, r1), "e1f10f9f       ldrexh r0, [r1]");
   COMPARE(strexh(r0, r1, r2), "e1e20f91       strexh r0, r1, [r2]");
   COMPARE(ldrex(r0, r1), "e1910f9f       ldrex r0, [r1]");
   COMPARE(strex(r0, r1, r2), "e1820f91       strex r0, r1, [r2]");
 
   VERIFY_RUN();
 }