[ARM] Implement D-register versions of vzip, vuzp, and vtrn.

test/cctest/test-assembler-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1300 matching lines @@
     uint32_t vshr_s8[4], vshr_u16[4], vshr_s32[5];
     uint32_t vceq[4], vceqf[4], vcgef[4], vcgtf[4];
     uint32_t vcge_s8[4], vcge_u16[4], vcge_s32[4];
     uint32_t vcgt_s8[4], vcgt_u16[4], vcgt_s32[4];
     float vrecpe[4], vrecps[4], vrsqrte[4], vrsqrts[4];
     float vminf[4], vmaxf[4];
     uint32_t vtst[4], vbsl[4];
     uint32_t vext[4];
     uint32_t vzip8a[4], vzip8b[4], vzip16a[4], vzip16b[4], vzip32a[4],
         vzip32b[4];
+    uint32_t vzipd8a[2], vzipd8b[2], vzipd16a[2], vzipd16b[2];
     uint32_t vuzp8a[4], vuzp8b[4], vuzp16a[4], vuzp16b[4], vuzp32a[4],
         vuzp32b[4];
+    uint32_t vuzpd8a[2], vuzpd8b[2], vuzpd16a[2], vuzpd16b[2];
     uint32_t vrev64_32[4], vrev64_16[4], vrev64_8[4];
     uint32_t vrev32_16[4], vrev32_8[4], vrev16_8[4];
     uint32_t vtrn8a[4], vtrn8b[4], vtrn16a[4], vtrn16b[4], vtrn32a[4],
         vtrn32b[4];
+    uint32_t vtrnd8a[2], vtrnd8b[2], vtrnd16a[2], vtrnd16b[2], vtrnd32a[2],
+        vtrnd32b[2];
     uint32_t vtbl[2], vtbx[2];
   } T;
   T t;
 
   // Create a function that accepts &t, and loads, manipulates, and stores
   // the doubles, floats, and SIMD values.
   Assembler assm(isolate, NULL, 0);
 
   if (CpuFeatures::IsSupported(NEON)) {
     CpuFeatureScope scope(&assm, NEON);
@@ skipping 512 matching lines @@
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
 
     // vext.
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vext(q2, q0, q1, 3);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vext))));
     __ vst1(Neon8, NeonListOperand(q2), NeonMemOperand(r4));
 
-    // vzip.
+    // vzip (q-register).
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vzip(Neon8, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vzip8a))));
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vzip8b))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vzip(Neon16, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vzip16a))));
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vzip16b))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vzip(Neon32, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vzip32a))));
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vzip32b))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
 
-    // vuzp.
+    // vzip (d-register).
+    __ vldr(d2, r0, offsetof(T, lane_test));
+    __ vmov(d0, d2);
+    __ vmov(d1, d2);
+    __ vzip(Neon8, d0, d1);
+    __ vstr(d0, r0, offsetof(T, vzipd8a));
+    __ vstr(d1, r0, offsetof(T, vzipd8b));
+    __ vmov(d0, d2);
+    __ vmov(d1, d2);
+    __ vzip(Neon16, d0, d1);
+    __ vstr(d0, r0, offsetof(T, vzipd16a));
+    __ vstr(d1, r0, offsetof(T, vzipd16b));
+
+    // vuzp (q-register).
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vuzp(Neon8, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vuzp8a))));
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vuzp8b))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vuzp(Neon16, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vuzp16a))));
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vuzp16b))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vuzp(Neon32, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vuzp32a))));
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vuzp32b))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
 
-    // vtrn.
+    // vuzp (d-register).
+    __ vldr(d2, r0, offsetof(T, lane_test));
+    __ vmov(d0, d2);
+    __ vmov(d1, d2);
+    __ vuzp(Neon8, d0, d1);
+    __ vstr(d0, r0, offsetof(T, vuzpd8a));
+    __ vstr(d1, r0, offsetof(T, vuzpd8b));
+    __ vmov(d0, d2);
+    __ vmov(d1, d2);
+    __ vuzp(Neon16, d0, d1);
+    __ vstr(d0, r0, offsetof(T, vuzpd16a));
+    __ vstr(d1, r0, offsetof(T, vuzpd16b));
+
+    // vtrn (q-register).
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vtrn(Neon8, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vtrn8a))));
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vtrn8b))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vtrn(Neon16, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vtrn16a))));
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vtrn16b))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vmov(q1, q0);
     __ vtrn(Neon32, q0, q1);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vtrn32a))));
     __ vst1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vtrn32b))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
 
+    // vtrn (d-register).
+    __ vldr(d2, r0, offsetof(T, lane_test));
+    __ vmov(d0, d2);
+    __ vmov(d1, d2);
+    __ vtrn(Neon8, d0, d1);
+    __ vstr(d0, r0, offsetof(T, vtrnd8a));
+    __ vstr(d1, r0, offsetof(T, vtrnd8b));
+    __ vmov(d0, d2);
+    __ vmov(d1, d2);
+    __ vtrn(Neon16, d0, d1);
+    __ vstr(d0, r0, offsetof(T, vtrnd16a));
+    __ vstr(d1, r0, offsetof(T, vtrnd16b));
+    __ vmov(d0, d2);
+    __ vmov(d1, d2);
+    __ vtrn(Neon32, d0, d1);
+    __ vstr(d0, r0, offsetof(T, vtrnd32a));
+    __ vstr(d1, r0, offsetof(T, vtrnd32b));
+
     // vrev64/32/16
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, lane_test))));
     __ vld1(Neon8, NeonListOperand(q0), NeonMemOperand(r4));
     __ vrev64(Neon32, q1, q0);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vrev64_32))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ vrev64(Neon16, q1, q0);
     __ add(r4, r0, Operand(static_cast<int32_t>(offsetof(T, vrev64_16))));
     __ vst1(Neon8, NeonListOperand(q1), NeonMemOperand(r4));
     __ vrev64(Neon8, q1, q0);
@@ skipping 186 matching lines @@
 
     CHECK_EQ_32X4(vext, 0x06050403u, 0x0a090807u, 0x0e0d0c0bu, 0x0201000fu);
 
     CHECK_EQ_32X4(vzip8a, 0x01010000u, 0x03030202u, 0x05050404u, 0x07070606u);
     CHECK_EQ_32X4(vzip8b, 0x09090808u, 0x0b0b0a0au, 0x0d0d0c0cu, 0x0f0f0e0eu);
     CHECK_EQ_32X4(vzip16a, 0x01000100u, 0x03020302u, 0x05040504u, 0x07060706u);
     CHECK_EQ_32X4(vzip16b, 0x09080908u, 0x0b0a0b0au, 0x0d0c0d0cu, 0x0f0e0f0eu);
     CHECK_EQ_32X4(vzip32a, 0x03020100u, 0x03020100u, 0x07060504u, 0x07060504u);
     CHECK_EQ_32X4(vzip32b, 0x0b0a0908u, 0x0b0a0908u, 0x0f0e0d0cu, 0x0f0e0d0cu);
 
+    CHECK_EQ_32X2(vzipd8a, 0x01010000u, 0x03030202u);
+    CHECK_EQ_32X2(vzipd8b, 0x05050404u, 0x07070606u);
+    CHECK_EQ_32X2(vzipd16a, 0x01000100u, 0x03020302u);
+    CHECK_EQ_32X2(vzipd16b, 0x05040504u, 0x07060706u);
+
     CHECK_EQ_32X4(vuzp8a, 0x06040200u, 0x0e0c0a08u, 0x06040200u, 0x0e0c0a08u);
     CHECK_EQ_32X4(vuzp8b, 0x07050301u, 0x0f0d0b09u, 0x07050301u, 0x0f0d0b09u);
     CHECK_EQ_32X4(vuzp16a, 0x05040100u, 0x0d0c0908u, 0x05040100u, 0x0d0c0908u);
     CHECK_EQ_32X4(vuzp16b, 0x07060302u, 0x0f0e0b0au, 0x07060302u, 0x0f0e0b0au);
     CHECK_EQ_32X4(vuzp32a, 0x03020100u, 0x0b0a0908u, 0x03020100u, 0x0b0a0908u);
     CHECK_EQ_32X4(vuzp32b, 0x07060504u, 0x0f0e0d0cu, 0x07060504u, 0x0f0e0d0cu);
 
+    CHECK_EQ_32X2(vuzpd8a, 0x06040200u, 0x06040200u);
+    CHECK_EQ_32X2(vuzpd8b, 0x07050301u, 0x07050301u);
+    CHECK_EQ_32X2(vuzpd16a, 0x05040100u, 0x05040100u);
+    CHECK_EQ_32X2(vuzpd16b, 0x07060302u, 0x07060302u);
+
     CHECK_EQ_32X4(vtrn8a, 0x02020000u, 0x06060404u, 0x0a0a0808u, 0x0e0e0c0cu);
     CHECK_EQ_32X4(vtrn8b, 0x03030101u, 0x07070505u, 0x0b0b0909u, 0x0f0f0d0du);
     CHECK_EQ_32X4(vtrn16a, 0x01000100u, 0x05040504u, 0x09080908u, 0x0d0c0d0cu);
     CHECK_EQ_32X4(vtrn16b, 0x03020302u, 0x07060706u, 0x0b0a0b0au, 0x0f0e0f0eu);
     CHECK_EQ_32X4(vtrn32a, 0x03020100u, 0x03020100u, 0x0b0a0908u, 0x0b0a0908u);
     CHECK_EQ_32X4(vtrn32b, 0x07060504u, 0x07060504u, 0x0f0e0d0cu, 0x0f0e0d0cu);
 
+    CHECK_EQ_32X2(vtrnd8a, 0x02020000u, 0x06060404u);
+    CHECK_EQ_32X2(vtrnd8b, 0x03030101u, 0x07070505u);
+    CHECK_EQ_32X2(vtrnd16a, 0x01000100u, 0x05040504u);
+    CHECK_EQ_32X2(vtrnd16b, 0x03020302u, 0x07060706u);
+    CHECK_EQ_32X2(vtrnd32a, 0x03020100u, 0x03020100u);
+    CHECK_EQ_32X2(vtrnd32b, 0x07060504u, 0x07060504u);
+
     // src: 0 1 2 3  4 5 6 7  8 9 a b  c d e f (little endian)
     CHECK_EQ_32X4(vrev64_32, 0x07060504u, 0x03020100u, 0x0f0e0d0cu,
                   0x0b0a0908u);
     CHECK_EQ_32X4(vrev64_16, 0x05040706u, 0x01000302u, 0x0d0c0f0eu,
                   0x09080b0au);
     CHECK_EQ_32X4(vrev64_8, 0x04050607u, 0x00010203u, 0x0c0d0e0fu, 0x08090a0bu);
     CHECK_EQ_32X4(vrev32_16, 0x01000302u, 0x05040706u, 0x09080b0au,
                   0x0d0c0f0eu);
     CHECK_EQ_32X4(vrev32_8, 0x00010203u, 0x04050607u, 0x08090a0bu, 0x0c0d0e0fu);
     CHECK_EQ_32X4(vrev16_8, 0x02030001u, 0x06070405u, 0x0a0b0809u, 0x0e0f0c0du);
@@ skipping 1677 matching lines @@
   HandleScope scope(isolate);
 
   Assembler assm(isolate, NULL, 0);
   __ mov(r0, Operand(isolate->factory()->infinity_value()));
   __ BlockConstPoolFor(1019);
   for (int i = 0; i < 1019; ++i) __ nop();
   __ vldr(d0, MemOperand(r0, 0));
 }
 
 #undef __