[turbofan] introduce Int32/64AbsWithOverflow optional operator

src/compiler/s390/code-generator-s390.cc

Index: src/compiler/s390/code-generator-s390.cc
diff --git a/src/compiler/s390/code-generator-s390.cc b/src/compiler/s390/code-generator-s390.cc
index d7a21c84b8c30747f0af2694f06e0522a3a3f37f..c0a6c4de58967b713278020da002243023d97985 100644
--- a/src/compiler/s390/code-generator-s390.cc
+++ b/src/compiler/s390/code-generator-s390.cc
@@ -309,6 +309,8 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
         case kS390_Add64:
         case kS390_Sub32:
         case kS390_Sub64:
+        case kS390_Abs64:
+        case kS390_Abs32:
           return overflow;
         default:
           break;
@@ -1347,6 +1349,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               Operand(offset.offset()));
       break;
     }
+    case kS390_Abs32:
+      // TODO(john.yan): zero-ext
+      __ lpr(i.OutputRegister(0), i.InputRegister(0));
+      break;
+    case kS390_Abs64:
+      __ lpgr(i.OutputRegister(0), i.InputRegister(0));
+      break;
     case kS390_And32:
       // zero-ext
       if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
@@ -1855,6 +1864,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       if (HasRegisterInput(instr, 1)) {
         __ And(r0, i.InputRegister(0), i.InputRegister(1));
       } else {
+        // detect tmlh/tmhl/tmhh case
         Operand opnd = i.InputImmediate(1);
         if (is_uint16(opnd.immediate())) {
           __ tmll(i.InputRegister(0), opnd);