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Side by Side Diff: src/compiler/x64/instruction-selector-x64.cc

Issue 2785773002: [turbofan] introduce Int32/64AbsWithOverflow optional operator (Closed)
Patch Set: add base impl Created 3 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <algorithm> 5 #include <algorithm>
6 6
7 #include "src/base/adapters.h" 7 #include "src/base/adapters.h"
8 #include "src/compiler/instruction-selector-impl.h" 8 #include "src/compiler/instruction-selector-impl.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/node-properties.h" 10 #include "src/compiler/node-properties.h"
(...skipping 2451 matching lines...) Expand 10 before | Expand all | Expand 10 after
2462 SIMD_SHIFT_OPCODES(VISIT_SIMD_SHIFT) 2462 SIMD_SHIFT_OPCODES(VISIT_SIMD_SHIFT)
2463 #undef VISIT_SIMD_SHIFT 2463 #undef VISIT_SIMD_SHIFT
2464 2464
2465 void InstructionSelector::VisitSimd32x4Select(Node* node) { 2465 void InstructionSelector::VisitSimd32x4Select(Node* node) {
2466 X64OperandGenerator g(this); 2466 X64OperandGenerator g(this);
2467 Emit(kX64Simd32x4Select, g.DefineSameAsFirst(node), 2467 Emit(kX64Simd32x4Select, g.DefineSameAsFirst(node),
2468 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), 2468 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)),
2469 g.UseRegister(node->InputAt(2))); 2469 g.UseRegister(node->InputAt(2)));
2470 } 2470 }
2471 2471
2472 void InstructionSelector::VisitInt32AbsWithOverflow(Node* node) {
2473 UNREACHABLE();
2474 }
2475
2476 void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
2477 UNREACHABLE();
2478 }
2479
2472 // static 2480 // static
2473 MachineOperatorBuilder::Flags 2481 MachineOperatorBuilder::Flags
2474 InstructionSelector::SupportedMachineOperatorFlags() { 2482 InstructionSelector::SupportedMachineOperatorFlags() {
2475 MachineOperatorBuilder::Flags flags = 2483 MachineOperatorBuilder::Flags flags =
2476 MachineOperatorBuilder::kWord32ShiftIsSafe | 2484 MachineOperatorBuilder::kWord32ShiftIsSafe |
2477 MachineOperatorBuilder::kWord32Ctz | MachineOperatorBuilder::kWord64Ctz; 2485 MachineOperatorBuilder::kWord32Ctz | MachineOperatorBuilder::kWord64Ctz;
2478 if (CpuFeatures::IsSupported(POPCNT)) { 2486 if (CpuFeatures::IsSupported(POPCNT)) {
2479 flags |= MachineOperatorBuilder::kWord32Popcnt | 2487 flags |= MachineOperatorBuilder::kWord32Popcnt |
2480 MachineOperatorBuilder::kWord64Popcnt; 2488 MachineOperatorBuilder::kWord64Popcnt;
2481 } 2489 }
(...skipping 13 matching lines...) Expand all
2495 // static 2503 // static
2496 MachineOperatorBuilder::AlignmentRequirements 2504 MachineOperatorBuilder::AlignmentRequirements
2497 InstructionSelector::AlignmentRequirements() { 2505 InstructionSelector::AlignmentRequirements() {
2498 return MachineOperatorBuilder::AlignmentRequirements:: 2506 return MachineOperatorBuilder::AlignmentRequirements::
2499 FullUnalignedAccessSupport(); 2507 FullUnalignedAccessSupport();
2500 } 2508 }
2501 2509
2502 } // namespace compiler 2510 } // namespace compiler
2503 } // namespace internal 2511 } // namespace internal
2504 } // namespace v8 2512 } // namespace v8
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