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Side by Side Diff: test/cctest/wasm/test-run-wasm-simd.cc

Issue 2780713003: MIPS[64]: Support for some SIMD operations (3) (Closed)
Patch Set: rebased Created 3 years, 8 months ago
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1 // Copyright 2016 the V8 project authors. All rights reserved. 1 // Copyright 2016 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/assembler-inl.h" 5 #include "src/assembler-inl.h"
6 #include "src/wasm/wasm-macro-gen.h" 6 #include "src/wasm/wasm-macro-gen.h"
7 #include "test/cctest/cctest.h" 7 #include "test/cctest/cctest.h"
8 #include "test/cctest/compiler/value-helper.h" 8 #include "test/cctest/compiler/value-helper.h"
9 #include "test/cctest/wasm/wasm-run-utils.h" 9 #include "test/cctest/wasm/wasm-run-utils.h"
10 10
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950 950
951 FOR_INT32_INPUTS(i) { 951 FOR_INT32_INPUTS(i) {
952 FOR_INT32_INPUTS(j) { CHECK_EQ(1, r.Call(*i, *j, expected_op(*i, *j))); } 952 FOR_INT32_INPUTS(j) { CHECK_EQ(1, r.Call(*i, *j, expected_op(*i, *j))); }
953 } 953 }
954 } 954 }
955 955
956 WASM_EXEC_COMPILED_TEST(I32x4Add) { RunI32x4BinOpTest(kExprI32x4Add, Add); } 956 WASM_EXEC_COMPILED_TEST(I32x4Add) { RunI32x4BinOpTest(kExprI32x4Add, Add); }
957 957
958 WASM_EXEC_COMPILED_TEST(I32x4Sub) { RunI32x4BinOpTest(kExprI32x4Sub, Sub); } 958 WASM_EXEC_COMPILED_TEST(I32x4Sub) { RunI32x4BinOpTest(kExprI32x4Sub, Sub); }
959 959
960 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET 960 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET || \
961 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
961 WASM_EXEC_COMPILED_TEST(I32x4Mul) { RunI32x4BinOpTest(kExprI32x4Mul, Mul); } 962 WASM_EXEC_COMPILED_TEST(I32x4Mul) { RunI32x4BinOpTest(kExprI32x4Mul, Mul); }
962 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET 963 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET ||
964 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
963 965
964 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET 966 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET
965 WASM_EXEC_COMPILED_TEST(S128And) { RunI32x4BinOpTest(kExprS128And, And); } 967 WASM_EXEC_COMPILED_TEST(S128And) { RunI32x4BinOpTest(kExprS128And, And); }
966 968
967 WASM_EXEC_COMPILED_TEST(S128Or) { RunI32x4BinOpTest(kExprS128Or, Or); } 969 WASM_EXEC_COMPILED_TEST(S128Or) { RunI32x4BinOpTest(kExprS128Or, Or); }
968 970
969 WASM_EXEC_COMPILED_TEST(S128Xor) { RunI32x4BinOpTest(kExprS128Xor, Xor); } 971 WASM_EXEC_COMPILED_TEST(S128Xor) { RunI32x4BinOpTest(kExprS128Xor, Xor); }
970 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET 972 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET
971 973
972 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET 974 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET || \
975 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
973 WASM_EXEC_COMPILED_TEST(I32x4Min) { 976 WASM_EXEC_COMPILED_TEST(I32x4Min) {
974 RunI32x4BinOpTest(kExprI32x4MinS, Minimum); 977 RunI32x4BinOpTest(kExprI32x4MinS, Minimum);
975 } 978 }
976 979
977 WASM_EXEC_COMPILED_TEST(I32x4MaxS) { 980 WASM_EXEC_COMPILED_TEST(I32x4MaxS) {
978 RunI32x4BinOpTest(kExprI32x4MaxS, Maximum); 981 RunI32x4BinOpTest(kExprI32x4MaxS, Maximum);
979 } 982 }
980 983
981 WASM_EXEC_COMPILED_TEST(I32x4MinU) { 984 WASM_EXEC_COMPILED_TEST(I32x4MinU) {
982 RunI32x4BinOpTest(kExprI32x4MinU, UnsignedMinimum); 985 RunI32x4BinOpTest(kExprI32x4MinU, UnsignedMinimum);
(...skipping 22 matching lines...) Expand all
1005 FOR_INT32_INPUTS(i) { 1008 FOR_INT32_INPUTS(i) {
1006 FOR_INT32_INPUTS(j) { CHECK_EQ(1, r.Call(*i, *j, expected_op(*i, *j))); } 1009 FOR_INT32_INPUTS(j) { CHECK_EQ(1, r.Call(*i, *j, expected_op(*i, *j))); }
1007 } 1010 }
1008 } 1011 }
1009 1012
1010 WASM_EXEC_COMPILED_TEST(I32x4Eq) { RunI32x4CompareOpTest(kExprI32x4Eq, Equal); } 1013 WASM_EXEC_COMPILED_TEST(I32x4Eq) { RunI32x4CompareOpTest(kExprI32x4Eq, Equal); }
1011 1014
1012 WASM_EXEC_COMPILED_TEST(I32x4Ne) { 1015 WASM_EXEC_COMPILED_TEST(I32x4Ne) {
1013 RunI32x4CompareOpTest(kExprI32x4Ne, NotEqual); 1016 RunI32x4CompareOpTest(kExprI32x4Ne, NotEqual);
1014 } 1017 }
1015 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET 1018 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET ||
1019 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1016 1020
1017 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET 1021 #if V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET
1018 WASM_EXEC_COMPILED_TEST(I32x4LtS) { 1022 WASM_EXEC_COMPILED_TEST(I32x4LtS) {
1019 RunI32x4CompareOpTest(kExprI32x4LtS, Less); 1023 RunI32x4CompareOpTest(kExprI32x4LtS, Less);
1020 } 1024 }
1021 1025
1022 WASM_EXEC_COMPILED_TEST(I32x4LeS) { 1026 WASM_EXEC_COMPILED_TEST(I32x4LeS) {
1023 RunI32x4CompareOpTest(kExprI32x4LeS, LessEqual); 1027 RunI32x4CompareOpTest(kExprI32x4LeS, LessEqual);
1024 } 1028 }
1025 1029
(...skipping 15 matching lines...) Expand all
1041 1045
1042 WASM_EXEC_COMPILED_TEST(I32x4GtU) { 1046 WASM_EXEC_COMPILED_TEST(I32x4GtU) {
1043 RunI32x4CompareOpTest(kExprI32x4GtU, UnsignedGreater); 1047 RunI32x4CompareOpTest(kExprI32x4GtU, UnsignedGreater);
1044 } 1048 }
1045 1049
1046 WASM_EXEC_COMPILED_TEST(I32x4GeU) { 1050 WASM_EXEC_COMPILED_TEST(I32x4GeU) {
1047 RunI32x4CompareOpTest(kExprI32x4GeU, UnsignedGreaterEqual); 1051 RunI32x4CompareOpTest(kExprI32x4GeU, UnsignedGreaterEqual);
1048 } 1052 }
1049 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET 1053 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET
1050 1054
1051 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET 1055 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET || \
1056 V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1052 void RunI32x4ShiftOpTest(WasmOpcode simd_op, Int32ShiftOp expected_op, 1057 void RunI32x4ShiftOpTest(WasmOpcode simd_op, Int32ShiftOp expected_op,
1053 int shift) { 1058 int shift) {
1054 FLAG_wasm_simd_prototype = true; 1059 FLAG_wasm_simd_prototype = true;
1055 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); 1060 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled);
1056 byte a = 0; 1061 byte a = 0;
1057 byte expected = 1; 1062 byte expected = 1;
1058 byte simd = r.AllocateLocal(kWasmS128); 1063 byte simd = r.AllocateLocal(kWasmS128);
1059 BUILD(r, WASM_SET_LOCAL(simd, WASM_SIMD_I32x4_SPLAT(WASM_GET_LOCAL(a))), 1064 BUILD(r, WASM_SET_LOCAL(simd, WASM_SIMD_I32x4_SPLAT(WASM_GET_LOCAL(a))),
1060 WASM_SET_LOCAL( 1065 WASM_SET_LOCAL(
1061 simd, WASM_SIMD_SHIFT_OP(simd_op, shift, WASM_GET_LOCAL(simd))), 1066 simd, WASM_SIMD_SHIFT_OP(simd_op, shift, WASM_GET_LOCAL(simd))),
1062 WASM_SIMD_CHECK_SPLAT4(I32x4, simd, I32, expected), WASM_ONE); 1067 WASM_SIMD_CHECK_SPLAT4(I32x4, simd, I32, expected), WASM_ONE);
1063 1068
1064 FOR_INT32_INPUTS(i) { CHECK_EQ(1, r.Call(*i, expected_op(*i, shift))); } 1069 FOR_INT32_INPUTS(i) { CHECK_EQ(1, r.Call(*i, expected_op(*i, shift))); }
1065 } 1070 }
1066 1071
1067 WASM_EXEC_COMPILED_TEST(I32x4Shl) { 1072 WASM_EXEC_COMPILED_TEST(I32x4Shl) {
1068 RunI32x4ShiftOpTest(kExprI32x4Shl, LogicalShiftLeft, 1); 1073 RunI32x4ShiftOpTest(kExprI32x4Shl, LogicalShiftLeft, 1);
1069 } 1074 }
1070 1075
1071 WASM_EXEC_COMPILED_TEST(I32x4ShrS) { 1076 WASM_EXEC_COMPILED_TEST(I32x4ShrS) {
1072 RunI32x4ShiftOpTest(kExprI32x4ShrS, ArithmeticShiftRight, 1); 1077 RunI32x4ShiftOpTest(kExprI32x4ShrS, ArithmeticShiftRight, 1);
1073 } 1078 }
1074 1079
1075 WASM_EXEC_COMPILED_TEST(I32x4ShrU) { 1080 WASM_EXEC_COMPILED_TEST(I32x4ShrU) {
1076 RunI32x4ShiftOpTest(kExprI32x4ShrU, LogicalShiftRight, 1); 1081 RunI32x4ShiftOpTest(kExprI32x4ShrU, LogicalShiftRight, 1);
1077 } 1082 }
1078 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET 1083 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || SIMD_LOWERING_TARGET ||
1084 // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
1079 1085
1080 #if V8_TARGET_ARCH_ARM 1086 #if V8_TARGET_ARCH_ARM
1081 void RunI16x8UnOpTest(WasmOpcode simd_op, Int16UnOp expected_op) { 1087 void RunI16x8UnOpTest(WasmOpcode simd_op, Int16UnOp expected_op) {
1082 FLAG_wasm_simd_prototype = true; 1088 FLAG_wasm_simd_prototype = true;
1083 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); 1089 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled);
1084 byte a = 0; 1090 byte a = 0;
1085 byte expected = 1; 1091 byte expected = 1;
1086 byte simd = r.AllocateLocal(kWasmS128); 1092 byte simd = r.AllocateLocal(kWasmS128);
1087 BUILD(r, WASM_SET_LOCAL(simd, WASM_SIMD_I16x8_SPLAT(WASM_GET_LOCAL(a))), 1093 BUILD(r, WASM_SET_LOCAL(simd, WASM_SIMD_I16x8_SPLAT(WASM_GET_LOCAL(a))),
1088 WASM_SET_LOCAL(simd, WASM_SIMD_UNOP(simd_op, WASM_GET_LOCAL(simd))), 1094 WASM_SET_LOCAL(simd, WASM_SIMD_UNOP(simd_op, WASM_GET_LOCAL(simd))),
(...skipping 299 matching lines...) Expand 10 before | Expand all | Expand 10 after
1388 1394
1389 WASM_EXEC_COMPILED_TEST(I8x16ShrS) { 1395 WASM_EXEC_COMPILED_TEST(I8x16ShrS) {
1390 RunI8x16ShiftOpTest(kExprI8x16ShrS, ArithmeticShiftRight, 1); 1396 RunI8x16ShiftOpTest(kExprI8x16ShrS, ArithmeticShiftRight, 1);
1391 } 1397 }
1392 1398
1393 WASM_EXEC_COMPILED_TEST(I8x16ShrU) { 1399 WASM_EXEC_COMPILED_TEST(I8x16ShrU) {
1394 RunI8x16ShiftOpTest(kExprI8x16ShrU, LogicalShiftRight, 1); 1400 RunI8x16ShiftOpTest(kExprI8x16ShrU, LogicalShiftRight, 1);
1395 } 1401 }
1396 #endif // V8_TARGET_ARCH_ARM 1402 #endif // V8_TARGET_ARCH_ARM
1397 1403
1398 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 1404 #if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_MIPS || \
1405 V8_TARGET_ARCH_MIPS64
1399 // Test Select by making a mask where the first two lanes are true and the rest 1406 // Test Select by making a mask where the first two lanes are true and the rest
1400 // false, and comparing for non-equality with zero to materialize a bool vector. 1407 // false, and comparing for non-equality with zero to materialize a bool vector.
1401 #define WASM_SIMD_SELECT_TEST(format) \ 1408 #define WASM_SIMD_SELECT_TEST(format) \
1402 WASM_EXEC_COMPILED_TEST(S##format##Select) { \ 1409 WASM_EXEC_COMPILED_TEST(S##format##Select) { \
1403 FLAG_wasm_simd_prototype = true; \ 1410 FLAG_wasm_simd_prototype = true; \
1404 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); \ 1411 WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); \
1405 byte val1 = 0; \ 1412 byte val1 = 0; \
1406 byte val2 = 1; \ 1413 byte val2 = 1; \
1407 byte src1 = r.AllocateLocal(kWasmS128); \ 1414 byte src1 = r.AllocateLocal(kWasmS128); \
1408 byte src2 = r.AllocateLocal(kWasmS128); \ 1415 byte src2 = r.AllocateLocal(kWasmS128); \
(...skipping 16 matching lines...) Expand all
1425 WASM_GET_LOCAL(src1), WASM_GET_LOCAL(src2))), \ 1432 WASM_GET_LOCAL(src1), WASM_GET_LOCAL(src2))), \
1426 WASM_SIMD_CHECK_LANE(I##format, mask, I32, val2, 0), \ 1433 WASM_SIMD_CHECK_LANE(I##format, mask, I32, val2, 0), \
1427 WASM_SIMD_CHECK_LANE(I##format, mask, I32, val1, 1), \ 1434 WASM_SIMD_CHECK_LANE(I##format, mask, I32, val1, 1), \
1428 WASM_SIMD_CHECK_LANE(I##format, mask, I32, val1, 2), \ 1435 WASM_SIMD_CHECK_LANE(I##format, mask, I32, val1, 2), \
1429 WASM_SIMD_CHECK_LANE(I##format, mask, I32, val2, 3), WASM_ONE); \ 1436 WASM_SIMD_CHECK_LANE(I##format, mask, I32, val2, 3), WASM_ONE); \
1430 \ 1437 \
1431 CHECK_EQ(1, r.Call(0x12, 0x34)); \ 1438 CHECK_EQ(1, r.Call(0x12, 0x34)); \
1432 } 1439 }
1433 1440
1434 WASM_SIMD_SELECT_TEST(32x4) 1441 WASM_SIMD_SELECT_TEST(32x4)
1435 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 1442 #endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_MIPS ||
1443 // V8_TARGET_ARCH_MIPS64
1436 1444
1437 #if V8_TARGET_ARCH_ARM 1445 #if V8_TARGET_ARCH_ARM
1438 WASM_SIMD_SELECT_TEST(16x8) 1446 WASM_SIMD_SELECT_TEST(16x8)
1439 WASM_SIMD_SELECT_TEST(8x16) 1447 WASM_SIMD_SELECT_TEST(8x16)
1440 1448
1441 // Boolean unary operations are 'AllTrue' and 'AnyTrue', which return an integer 1449 // Boolean unary operations are 'AllTrue' and 'AnyTrue', which return an integer
1442 // result. Use relational ops on numeric vectors to create the boolean vector 1450 // result. Use relational ops on numeric vectors to create the boolean vector
1443 // test inputs. Test inputs with all true, all false, one true, and one false. 1451 // test inputs. Test inputs with all true, all false, one true, and one false.
1444 #define WASM_SIMD_BOOL_REDUCTION_TEST(format, lanes) \ 1452 #define WASM_SIMD_BOOL_REDUCTION_TEST(format, lanes) \
1445 WASM_EXEC_TEST(ReductionTest##lanes) { \ 1453 WASM_EXEC_TEST(ReductionTest##lanes) { \
(...skipping 410 matching lines...) Expand 10 before | Expand all | Expand 10 after
1856 WASM_SIMD_I32x4_EXTRACT_LANE( 1864 WASM_SIMD_I32x4_EXTRACT_LANE(
1857 0, WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO))); 1865 0, WASM_LOAD_MEM(MachineType::Simd128(), WASM_ZERO)));
1858 1866
1859 FOR_INT32_INPUTS(i) { 1867 FOR_INT32_INPUTS(i) {
1860 int32_t expected = *i; 1868 int32_t expected = *i;
1861 r.module().WriteMemory(&memory[0], expected); 1869 r.module().WriteMemory(&memory[0], expected);
1862 CHECK_EQ(expected, r.Call()); 1870 CHECK_EQ(expected, r.Call());
1863 } 1871 }
1864 } 1872 }
1865 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET 1873 #endif // V8_TARGET_ARCH_ARM || SIMD_LOWERING_TARGET
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