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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/instruction-selector.h" | 5 #include "src/compiler/instruction-selector.h" |
6 | 6 |
7 #include <limits> | 7 #include <limits> |
8 | 8 |
9 #include "src/assembler-inl.h" | 9 #include "src/assembler-inl.h" |
10 #include "src/base/adapters.h" | 10 #include "src/base/adapters.h" |
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2103 void InstructionSelector::VisitI32x4ExtractLane(Node* node) { UNIMPLEMENTED(); } | 2103 void InstructionSelector::VisitI32x4ExtractLane(Node* node) { UNIMPLEMENTED(); } |
2104 | 2104 |
2105 void InstructionSelector::VisitI32x4ReplaceLane(Node* node) { UNIMPLEMENTED(); } | 2105 void InstructionSelector::VisitI32x4ReplaceLane(Node* node) { UNIMPLEMENTED(); } |
2106 | 2106 |
2107 void InstructionSelector::VisitI32x4Add(Node* node) { UNIMPLEMENTED(); } | 2107 void InstructionSelector::VisitI32x4Add(Node* node) { UNIMPLEMENTED(); } |
2108 | 2108 |
2109 void InstructionSelector::VisitI32x4Sub(Node* node) { UNIMPLEMENTED(); } | 2109 void InstructionSelector::VisitI32x4Sub(Node* node) { UNIMPLEMENTED(); } |
2110 #endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32 && | 2110 #endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32 && |
2111 // !V8_TARGET_ARCH_MIPS && !V8_TARGET_ARCH_MIPS64 | 2111 // !V8_TARGET_ARCH_MIPS && !V8_TARGET_ARCH_MIPS64 |
2112 | 2112 |
2113 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM | 2113 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS && \ |
2114 !V8_TARGET_ARCH_MIPS64 | |
ivica.bogosavljevic
2017/04/05 13:00:53
What will happen if MIPS architecture doesn't supp
dusan.simicic
2017/04/05 13:36:32
If MSA instructions are not supported, SIMD operat
| |
2114 void InstructionSelector::VisitI32x4Shl(Node* node) { UNIMPLEMENTED(); } | 2115 void InstructionSelector::VisitI32x4Shl(Node* node) { UNIMPLEMENTED(); } |
2115 | 2116 |
2116 void InstructionSelector::VisitI32x4ShrS(Node* node) { UNIMPLEMENTED(); } | 2117 void InstructionSelector::VisitI32x4ShrS(Node* node) { UNIMPLEMENTED(); } |
2117 | 2118 |
2118 void InstructionSelector::VisitI32x4Mul(Node* node) { UNIMPLEMENTED(); } | 2119 void InstructionSelector::VisitI32x4Mul(Node* node) { UNIMPLEMENTED(); } |
2119 | 2120 |
2120 void InstructionSelector::VisitI32x4MaxS(Node* node) { UNIMPLEMENTED(); } | 2121 void InstructionSelector::VisitI32x4MaxS(Node* node) { UNIMPLEMENTED(); } |
2121 | 2122 |
2122 void InstructionSelector::VisitI32x4MinS(Node* node) { UNIMPLEMENTED(); } | 2123 void InstructionSelector::VisitI32x4MinS(Node* node) { UNIMPLEMENTED(); } |
2123 | 2124 |
2124 void InstructionSelector::VisitI32x4Eq(Node* node) { UNIMPLEMENTED(); } | 2125 void InstructionSelector::VisitI32x4Eq(Node* node) { UNIMPLEMENTED(); } |
2125 | 2126 |
2126 void InstructionSelector::VisitI32x4Ne(Node* node) { UNIMPLEMENTED(); } | 2127 void InstructionSelector::VisitI32x4Ne(Node* node) { UNIMPLEMENTED(); } |
2127 | 2128 |
2128 void InstructionSelector::VisitI32x4MinU(Node* node) { UNIMPLEMENTED(); } | 2129 void InstructionSelector::VisitI32x4MinU(Node* node) { UNIMPLEMENTED(); } |
2129 | 2130 |
2130 void InstructionSelector::VisitI32x4MaxU(Node* node) { UNIMPLEMENTED(); } | 2131 void InstructionSelector::VisitI32x4MaxU(Node* node) { UNIMPLEMENTED(); } |
2131 | 2132 |
2132 void InstructionSelector::VisitI32x4ShrU(Node* node) { UNIMPLEMENTED(); } | 2133 void InstructionSelector::VisitI32x4ShrU(Node* node) { UNIMPLEMENTED(); } |
2133 #endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM | 2134 #endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS && |
2135 // !V8_TARGET_ARCH_MIPS64 | |
2134 | 2136 |
2135 #if !V8_TARGET_ARCH_ARM | 2137 #if !V8_TARGET_ARCH_ARM |
2136 void InstructionSelector::VisitI32x4SConvertF32x4(Node* node) { | 2138 void InstructionSelector::VisitI32x4SConvertF32x4(Node* node) { |
2137 UNIMPLEMENTED(); | 2139 UNIMPLEMENTED(); |
2138 } | 2140 } |
2139 | 2141 |
2140 void InstructionSelector::VisitI32x4Neg(Node* node) { UNIMPLEMENTED(); } | 2142 void InstructionSelector::VisitI32x4Neg(Node* node) { UNIMPLEMENTED(); } |
2141 | 2143 |
2142 void InstructionSelector::VisitI32x4LtS(Node* node) { UNIMPLEMENTED(); } | 2144 void InstructionSelector::VisitI32x4LtS(Node* node) { UNIMPLEMENTED(); } |
2143 | 2145 |
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2277 void InstructionSelector::VisitS128Zero(Node* node) { UNIMPLEMENTED(); } | 2279 void InstructionSelector::VisitS128Zero(Node* node) { UNIMPLEMENTED(); } |
2278 | 2280 |
2279 void InstructionSelector::VisitS1x4Zero(Node* node) { UNIMPLEMENTED(); } | 2281 void InstructionSelector::VisitS1x4Zero(Node* node) { UNIMPLEMENTED(); } |
2280 | 2282 |
2281 void InstructionSelector::VisitS1x8Zero(Node* node) { UNIMPLEMENTED(); } | 2283 void InstructionSelector::VisitS1x8Zero(Node* node) { UNIMPLEMENTED(); } |
2282 | 2284 |
2283 void InstructionSelector::VisitS1x16Zero(Node* node) { UNIMPLEMENTED(); } | 2285 void InstructionSelector::VisitS1x16Zero(Node* node) { UNIMPLEMENTED(); } |
2284 #endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS && | 2286 #endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS && |
2285 // !V8_TARGET_ARCH_MIPS64 | 2287 // !V8_TARGET_ARCH_MIPS64 |
2286 | 2288 |
2287 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM | 2289 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS && \ |
2290 !V8_TARGET_ARCH_MIPS64 | |
2288 void InstructionSelector::VisitS32x4Select(Node* node) { UNIMPLEMENTED(); } | 2291 void InstructionSelector::VisitS32x4Select(Node* node) { UNIMPLEMENTED(); } |
2289 #endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM | 2292 #endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS && |
2293 // !V8_TARGET_ARCH_MIPS64 | |
2290 | 2294 |
2291 #if !V8_TARGET_ARCH_ARM | 2295 #if !V8_TARGET_ARCH_ARM |
2292 void InstructionSelector::VisitS16x8Select(Node* node) { UNIMPLEMENTED(); } | 2296 void InstructionSelector::VisitS16x8Select(Node* node) { UNIMPLEMENTED(); } |
2293 | 2297 |
2294 void InstructionSelector::VisitS8x16Select(Node* node) { UNIMPLEMENTED(); } | 2298 void InstructionSelector::VisitS8x16Select(Node* node) { UNIMPLEMENTED(); } |
2295 | 2299 |
2296 void InstructionSelector::VisitS1x4And(Node* node) { UNIMPLEMENTED(); } | 2300 void InstructionSelector::VisitS1x4And(Node* node) { UNIMPLEMENTED(); } |
2297 | 2301 |
2298 void InstructionSelector::VisitS1x4Or(Node* node) { UNIMPLEMENTED(); } | 2302 void InstructionSelector::VisitS1x4Or(Node* node) { UNIMPLEMENTED(); } |
2299 | 2303 |
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2702 return new (instruction_zone()) FrameStateDescriptor( | 2706 return new (instruction_zone()) FrameStateDescriptor( |
2703 instruction_zone(), state_info.type(), state_info.bailout_id(), | 2707 instruction_zone(), state_info.type(), state_info.bailout_id(), |
2704 state_info.state_combine(), parameters, locals, stack, | 2708 state_info.state_combine(), parameters, locals, stack, |
2705 state_info.shared_info(), outer_state); | 2709 state_info.shared_info(), outer_state); |
2706 } | 2710 } |
2707 | 2711 |
2708 | 2712 |
2709 } // namespace compiler | 2713 } // namespace compiler |
2710 } // namespace internal | 2714 } // namespace internal |
2711 } // namespace v8 | 2715 } // namespace v8 |
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