MIPS[64]: Support for some SIMD operations (4)

src/compiler/mips/instruction-codes-mips.h

Index: src/compiler/mips/instruction-codes-mips.h
diff --git a/src/compiler/mips/instruction-codes-mips.h b/src/compiler/mips/instruction-codes-mips.h
index 7d0e75561709ca533b1b43e8f14fc664f74b5b82..206fbebf4aa7c0344d78a87b409c61384644e480 100644
--- a/src/compiler/mips/instruction-codes-mips.h
+++ b/src/compiler/mips/instruction-codes-mips.h
@@ -154,7 +154,24 @@ namespace compiler {
   V(MipsI32x4ShrU)                 \
   V(MipsI32x4MaxU)                 \
   V(MipsI32x4MinU)                 \
-  V(MipsS32x4Select)
+  V(MipsS32x4Select)               \
+  V(MipsF32x4Abs)                  \
+  V(MipsF32x4Neg)                  \
+  V(MipsF32x4RecipApprox)          \
+  V(MipsF32x4RecipRefine)          \
+  V(MipsF32x4RecipSqrtApprox)      \
+  V(MipsF32x4RecipSqrtRefine)      \
+  V(MipsF32x4Add)                  \
+  V(MipsF32x4Sub)                  \
+  V(MipsF32x4Mul)                  \
+  V(MipsF32x4Max)                  \
+  V(MipsF32x4Min)                  \
+  V(MipsF32x4Eq)                   \
+  V(MipsF32x4Ne)                   \
+  V(MipsF32x4Lt)                   \
+  V(MipsF32x4Le)                   \
+  V(MipsI32x4SConvertF32x4)        \
+  V(MipsI32x4UConvertF32x4)
 
 // Addressing modes represent the "shape" of inputs to an instruction.
 // Many instructions support multiple addressing modes. Addressing modes