Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(164)

Unified Diff: src/compiler/mips/instruction-codes-mips.h

Issue 2778203002: MIPS[64]: Support for some SIMD operations (4) (Closed)
Patch Set: Created 3 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
Index: src/compiler/mips/instruction-codes-mips.h
diff --git a/src/compiler/mips/instruction-codes-mips.h b/src/compiler/mips/instruction-codes-mips.h
index edff56f72b4ad29fde77d43e84019aac15679311..fc80cbdd9b955f95a238ab8c1aa91eab34713669 100644
--- a/src/compiler/mips/instruction-codes-mips.h
+++ b/src/compiler/mips/instruction-codes-mips.h
@@ -132,7 +132,24 @@ namespace compiler {
V(MipsByteSwap32) \
V(MipsStackClaim) \
V(MipsSeb) \
- V(MipsSeh)
+ V(MipsSeh) \
+ V(MipsFloat32x4Abs) \
+ V(MipsFloat32x4Neg) \
+ V(MipsFloat32x4RecipApprox) \
+ V(MipsFloat32x4RecipRefine) \
+ V(MipsFloat32x4RecipSqrtApprox) \
+ V(MipsFloat32x4RecipSqrtRefine) \
+ V(MipsFloat32x4Add) \
+ V(MipsFloat32x4Sub) \
+ V(MipsFloat32x4Mul) \
+ V(MipsFloat32x4Max) \
+ V(MipsFloat32x4Min) \
+ V(MipsFloat32xEqual) \
+ V(MipsFloat32x4NotEqual) \
+ V(MipsFloat32xLessThan) \
+ V(MipsFloat32xLessThanOrEqual) \
+ V(MipsInt32x4FromFloat32x4) \
+ V(MipsUint32x4FromFloat32x4)
// Addressing modes represent the "shape" of inputs to an instruction.
// Many instructions support multiple addressing modes. Addressing modes

Powered by Google App Engine
This is Rietveld 408576698