Index: src/compiler/opcodes.h |
diff --git a/src/compiler/opcodes.h b/src/compiler/opcodes.h |
index d3e18fbcb089fb48192d700ad270e1ef500c585f..896e0b4a3934c8c315dd49d42a5693ab24af9220 100644 |
--- a/src/compiler/opcodes.h |
+++ b/src/compiler/opcodes.h |
@@ -557,161 +557,152 @@ |
V(AtomicCompareExchange) \ |
V(UnsafePointerAdd) |
-#define MACHINE_SIMD_OP_LIST(V) \ |
- V(Float32x4Splat) \ |
- V(Float32x4ExtractLane) \ |
- V(Float32x4ReplaceLane) \ |
- V(Float32x4Abs) \ |
- V(Float32x4Neg) \ |
- V(Float32x4Sqrt) \ |
- V(Float32x4RecipApprox) \ |
- V(Float32x4RecipSqrtApprox) \ |
- V(Float32x4Add) \ |
- V(Float32x4Sub) \ |
- V(Float32x4Mul) \ |
- V(Float32x4Div) \ |
- V(Float32x4Min) \ |
- V(Float32x4Max) \ |
- V(Float32x4MinNum) \ |
- V(Float32x4MaxNum) \ |
- V(Float32x4RecipRefine) \ |
- V(Float32x4RecipSqrtRefine) \ |
- V(Float32x4Equal) \ |
- V(Float32x4NotEqual) \ |
- V(Float32x4LessThan) \ |
- V(Float32x4LessThanOrEqual) \ |
- V(Float32x4GreaterThan) \ |
- V(Float32x4GreaterThanOrEqual) \ |
- V(Float32x4FromInt32x4) \ |
- V(Float32x4FromUint32x4) \ |
- V(Int32x4Splat) \ |
- V(Int32x4ExtractLane) \ |
- V(Int32x4ReplaceLane) \ |
- V(Int32x4Neg) \ |
- V(Int32x4Add) \ |
- V(Int32x4Sub) \ |
- V(Int32x4Mul) \ |
- V(Int32x4Min) \ |
- V(Int32x4Max) \ |
- V(Int32x4ShiftLeftByScalar) \ |
- V(Int32x4ShiftRightByScalar) \ |
- V(Int32x4Equal) \ |
- V(Int32x4NotEqual) \ |
- V(Int32x4LessThan) \ |
- V(Int32x4LessThanOrEqual) \ |
- V(Int32x4GreaterThan) \ |
- V(Int32x4GreaterThanOrEqual) \ |
- V(Int32x4FromFloat32x4) \ |
- V(Uint32x4Min) \ |
- V(Uint32x4Max) \ |
- V(Uint32x4ShiftLeftByScalar) \ |
- V(Uint32x4ShiftRightByScalar) \ |
- V(Uint32x4LessThan) \ |
- V(Uint32x4LessThanOrEqual) \ |
- V(Uint32x4GreaterThan) \ |
- V(Uint32x4GreaterThanOrEqual) \ |
- V(Uint32x4FromFloat32x4) \ |
- V(Int16x8Splat) \ |
- V(Int16x8ExtractLane) \ |
- V(Int16x8ReplaceLane) \ |
- V(Int16x8Neg) \ |
- V(Int16x8Add) \ |
- V(Int16x8AddSaturate) \ |
- V(Int16x8Sub) \ |
- V(Int16x8SubSaturate) \ |
- V(Int16x8Mul) \ |
- V(Int16x8Min) \ |
- V(Int16x8Max) \ |
- V(Int16x8ShiftLeftByScalar) \ |
- V(Int16x8ShiftRightByScalar) \ |
- V(Int16x8Equal) \ |
- V(Int16x8NotEqual) \ |
- V(Int16x8LessThan) \ |
- V(Int16x8LessThanOrEqual) \ |
- V(Int16x8GreaterThan) \ |
- V(Int16x8GreaterThanOrEqual) \ |
- V(Uint16x8AddSaturate) \ |
- V(Uint16x8SubSaturate) \ |
- V(Uint16x8Min) \ |
- V(Uint16x8Max) \ |
- V(Uint16x8ShiftLeftByScalar) \ |
- V(Uint16x8ShiftRightByScalar) \ |
- V(Uint16x8LessThan) \ |
- V(Uint16x8LessThanOrEqual) \ |
- V(Uint16x8GreaterThan) \ |
- V(Uint16x8GreaterThanOrEqual) \ |
- V(Int8x16Splat) \ |
- V(Int8x16ExtractLane) \ |
- V(Int8x16ReplaceLane) \ |
- V(Int8x16Neg) \ |
- V(Int8x16Add) \ |
- V(Int8x16AddSaturate) \ |
- V(Int8x16Sub) \ |
- V(Int8x16SubSaturate) \ |
- V(Int8x16Mul) \ |
- V(Int8x16Min) \ |
- V(Int8x16Max) \ |
- V(Int8x16ShiftLeftByScalar) \ |
- V(Int8x16ShiftRightByScalar) \ |
- V(Int8x16Equal) \ |
- V(Int8x16NotEqual) \ |
- V(Int8x16LessThan) \ |
- V(Int8x16LessThanOrEqual) \ |
- V(Int8x16GreaterThan) \ |
- V(Int8x16GreaterThanOrEqual) \ |
- V(Uint8x16AddSaturate) \ |
- V(Uint8x16SubSaturate) \ |
- V(Uint8x16Min) \ |
- V(Uint8x16Max) \ |
- V(Uint8x16ShiftLeftByScalar) \ |
- V(Uint8x16ShiftRightByScalar) \ |
- V(Uint8x16LessThan) \ |
- V(Uint8x16LessThanOrEqual) \ |
- V(Uint8x16GreaterThan) \ |
- V(Uint8x16GreaterThanOrEqual) \ |
- V(Simd128Load) \ |
- V(Simd128Load1) \ |
- V(Simd128Load2) \ |
- V(Simd128Load3) \ |
- V(Simd128Store) \ |
- V(Simd128Store1) \ |
- V(Simd128Store2) \ |
- V(Simd128Store3) \ |
- V(Simd128Zero) \ |
- V(Simd128And) \ |
- V(Simd128Or) \ |
- V(Simd128Xor) \ |
- V(Simd128Not) \ |
- V(Simd32x4Select) \ |
- V(Simd32x4Swizzle) \ |
- V(Simd32x4Shuffle) \ |
- V(Simd16x8Select) \ |
- V(Simd16x8Swizzle) \ |
- V(Simd16x8Shuffle) \ |
- V(Simd8x16Select) \ |
- V(Simd8x16Swizzle) \ |
- V(Simd8x16Shuffle) \ |
- V(Simd1x4Zero) \ |
- V(Simd1x4And) \ |
- V(Simd1x4Or) \ |
- V(Simd1x4Xor) \ |
- V(Simd1x4Not) \ |
- V(Simd1x4AnyTrue) \ |
- V(Simd1x4AllTrue) \ |
- V(Simd1x8Zero) \ |
- V(Simd1x8And) \ |
- V(Simd1x8Or) \ |
- V(Simd1x8Xor) \ |
- V(Simd1x8Not) \ |
- V(Simd1x8AnyTrue) \ |
- V(Simd1x8AllTrue) \ |
- V(Simd1x16Zero) \ |
- V(Simd1x16And) \ |
- V(Simd1x16Or) \ |
- V(Simd1x16Xor) \ |
- V(Simd1x16Not) \ |
- V(Simd1x16AnyTrue) \ |
- V(Simd1x16AllTrue) |
+#define MACHINE_SIMD_OP_LIST(V) \ |
+ V(F32x4Splat) \ |
+ V(F32x4ExtractLane) \ |
+ V(F32x4ReplaceLane) \ |
+ V(F32x4SConvertI32x4) \ |
+ V(F32x4UConvertI32x4) \ |
+ V(F32x4Abs) \ |
+ V(F32x4Neg) \ |
+ V(F32x4Sqrt) \ |
+ V(F32x4RecipApprox) \ |
+ V(F32x4RecipSqrtApprox) \ |
+ V(F32x4Add) \ |
+ V(F32x4Sub) \ |
+ V(F32x4Mul) \ |
+ V(F32x4Div) \ |
+ V(F32x4Min) \ |
+ V(F32x4Max) \ |
+ V(F32x4MinNum) \ |
+ V(F32x4MaxNum) \ |
+ V(F32x4RecipRefine) \ |
+ V(F32x4RecipSqrtRefine) \ |
+ V(F32x4Eq) \ |
+ V(F32x4Ne) \ |
+ V(F32x4Lt) \ |
+ V(F32x4Le) \ |
+ V(F32x4Gt) \ |
+ V(F32x4Ge) \ |
+ V(I32x4Splat) \ |
+ V(I32x4ExtractLane) \ |
+ V(I32x4ReplaceLane) \ |
+ V(I32x4SConvertF32x4) \ |
+ V(I32x4Neg) \ |
+ V(I32x4Shl) \ |
+ V(I32x4ShrS) \ |
+ V(I32x4Add) \ |
+ V(I32x4Sub) \ |
+ V(I32x4Mul) \ |
+ V(I32x4MinS) \ |
+ V(I32x4MaxS) \ |
+ V(I32x4Eq) \ |
+ V(I32x4Ne) \ |
+ V(I32x4LtS) \ |
+ V(I32x4LeS) \ |
+ V(I32x4GtS) \ |
+ V(I32x4GeS) \ |
+ V(I32x4UConvertF32x4) \ |
+ V(I32x4ShrU) \ |
+ V(I32x4MinU) \ |
+ V(I32x4MaxU) \ |
+ V(I32x4LtU) \ |
+ V(I32x4LeU) \ |
+ V(I32x4GtU) \ |
+ V(I32x4GeU) \ |
+ V(I16x8Splat) \ |
+ V(I16x8ExtractLane) \ |
+ V(I16x8ReplaceLane) \ |
+ V(I16x8Neg) \ |
+ V(I16x8Shl) \ |
+ V(I16x8ShrS) \ |
+ V(I16x8Add) \ |
+ V(I16x8AddSaturateS) \ |
+ V(I16x8Sub) \ |
+ V(I16x8SubSaturateS) \ |
+ V(I16x8Mul) \ |
+ V(I16x8MinS) \ |
+ V(I16x8MaxS) \ |
+ V(I16x8Eq) \ |
+ V(I16x8Ne) \ |
+ V(I16x8LtS) \ |
+ V(I16x8LeS) \ |
+ V(I16x8GtS) \ |
+ V(I16x8GeS) \ |
+ V(I16x8AddSaturateU) \ |
+ V(I16x8SubSaturateU) \ |
+ V(I16x8ShrU) \ |
+ V(I16x8MinU) \ |
+ V(I16x8MaxU) \ |
+ V(I16x8LtU) \ |
+ V(I16x8LeU) \ |
+ V(I16x8GtU) \ |
+ V(I16x8GeU) \ |
+ V(I8x16Splat) \ |
+ V(I8x16ExtractLane) \ |
+ V(I8x16ReplaceLane) \ |
+ V(I8x16Neg) \ |
+ V(I8x16Shl) \ |
+ V(I8x16ShrS) \ |
+ V(I8x16Add) \ |
+ V(I8x16AddSaturateS) \ |
+ V(I8x16Sub) \ |
+ V(I8x16SubSaturateS) \ |
+ V(I8x16Mul) \ |
+ V(I8x16MinS) \ |
+ V(I8x16MaxS) \ |
+ V(I8x16Eq) \ |
+ V(I8x16Ne) \ |
+ V(I8x16LtS) \ |
+ V(I8x16LeS) \ |
+ V(I8x16GtS) \ |
+ V(I8x16GeS) \ |
+ V(I8x16AddSaturateU) \ |
+ V(I8x16SubSaturateU) \ |
+ V(I8x16ShrU) \ |
+ V(I8x16MinU) \ |
+ V(I8x16MaxU) \ |
+ V(I8x16LtU) \ |
+ V(I8x16LeU) \ |
+ V(I8x16GtU) \ |
+ V(I8x16GeU) \ |
+ V(S128Load) \ |
+ V(S128Store) \ |
+ V(S128Zero) \ |
+ V(S128And) \ |
+ V(S128Or) \ |
+ V(S128Xor) \ |
+ V(S128Not) \ |
+ V(S32x4Select) \ |
+ V(S32x4Swizzle) \ |
+ V(S32x4Shuffle) \ |
+ V(S16x8Select) \ |
+ V(S16x8Swizzle) \ |
+ V(S16x8Shuffle) \ |
+ V(S8x16Select) \ |
+ V(S8x16Swizzle) \ |
+ V(S8x16Shuffle) \ |
+ V(S1x4Zero) \ |
+ V(S1x4And) \ |
+ V(S1x4Or) \ |
+ V(S1x4Xor) \ |
+ V(S1x4Not) \ |
+ V(S1x4AnyTrue) \ |
+ V(S1x4AllTrue) \ |
+ V(S1x8Zero) \ |
+ V(S1x8And) \ |
+ V(S1x8Or) \ |
+ V(S1x8Xor) \ |
+ V(S1x8Not) \ |
+ V(S1x8AnyTrue) \ |
+ V(S1x8AllTrue) \ |
+ V(S1x16Zero) \ |
+ V(S1x16And) \ |
+ V(S1x16Or) \ |
+ V(S1x16Xor) \ |
+ V(S1x16Not) \ |
+ V(S1x16AnyTrue) \ |
+ V(S1x16AllTrue) |
#define VALUE_OP_LIST(V) \ |
COMMON_OP_LIST(V) \ |