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1 // Copyright 2016 the V8 project authors. All rights reserved. | 1 // Copyright 2016 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/simd-scalar-lowering.h" | 5 #include "src/compiler/simd-scalar-lowering.h" |
6 #include "src/compiler/diamond.h" | 6 #include "src/compiler/diamond.h" |
7 #include "src/compiler/linkage.h" | 7 #include "src/compiler/linkage.h" |
8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
10 | 10 |
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60 } else { | 60 } else { |
61 stack_.push_back({input, 0}); | 61 stack_.push_back({input, 0}); |
62 } | 62 } |
63 state_.Set(input, State::kOnStack); | 63 state_.Set(input, State::kOnStack); |
64 } | 64 } |
65 } | 65 } |
66 } | 66 } |
67 } | 67 } |
68 | 68 |
69 #define FOREACH_INT32X4_OPCODE(V) \ | 69 #define FOREACH_INT32X4_OPCODE(V) \ |
70 V(Int32x4Splat) \ | 70 V(I32x4Splat) \ |
71 V(Int32x4ExtractLane) \ | 71 V(I32x4ExtractLane) \ |
72 V(Int32x4ReplaceLane) \ | 72 V(I32x4ReplaceLane) \ |
73 V(Int32x4Neg) \ | 73 V(I32x4SConvertF32x4) \ |
74 V(Simd128Not) \ | 74 V(I32x4UConvertF32x4) \ |
75 V(Int32x4Add) \ | 75 V(I32x4Neg) \ |
76 V(Int32x4Sub) \ | 76 V(I32x4Add) \ |
77 V(Int32x4Mul) \ | 77 V(I32x4Sub) \ |
78 V(Int32x4Min) \ | 78 V(I32x4Mul) \ |
79 V(Int32x4Max) \ | 79 V(I32x4MinS) \ |
80 V(Uint32x4Min) \ | 80 V(I32x4MaxS) \ |
81 V(Uint32x4Max) \ | 81 V(I32x4MinU) \ |
82 V(Simd128And) \ | 82 V(I32x4MaxU) \ |
83 V(Simd128Or) \ | 83 V(S128And) \ |
84 V(Simd128Xor) \ | 84 V(S128Or) \ |
85 V(Int32x4FromFloat32x4) \ | 85 V(S128Xor) \ |
86 V(Uint32x4FromFloat32x4) | 86 V(S128Not) |
87 | 87 |
88 #define FOREACH_FLOAT32X4_OPCODE(V) \ | 88 #define FOREACH_FLOAT32X4_OPCODE(V) \ |
89 V(Float32x4Splat) \ | 89 V(F32x4Splat) \ |
90 V(Float32x4ExtractLane) \ | 90 V(F32x4ExtractLane) \ |
91 V(Float32x4ReplaceLane) \ | 91 V(F32x4ReplaceLane) \ |
92 V(Float32x4Abs) \ | 92 V(F32x4SConvertI32x4) \ |
93 V(Float32x4Neg) \ | 93 V(F32x4UConvertI32x4) \ |
94 V(Float32x4Add) \ | 94 V(F32x4Abs) \ |
95 V(Float32x4Sub) \ | 95 V(F32x4Neg) \ |
96 V(Float32x4Mul) \ | 96 V(F32x4Add) \ |
97 V(Float32x4Div) \ | 97 V(F32x4Sub) \ |
98 V(Float32x4Min) \ | 98 V(F32x4Mul) \ |
99 V(Float32x4Max) \ | 99 V(F32x4Div) \ |
100 V(Float32x4FromInt32x4) \ | 100 V(F32x4Min) \ |
101 V(Float32x4FromUint32x4) | 101 V(F32x4Max) |
102 | 102 |
103 #define FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(V) \ | 103 #define FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(V) \ |
104 V(Float32x4Equal) \ | 104 V(F32x4Eq) \ |
105 V(Float32x4NotEqual) \ | 105 V(F32x4Ne) \ |
106 V(Float32x4LessThan) \ | 106 V(F32x4Lt) \ |
107 V(Float32x4LessThanOrEqual) \ | 107 V(F32x4Le) \ |
108 V(Float32x4GreaterThan) \ | 108 V(F32x4Gt) \ |
109 V(Float32x4GreaterThanOrEqual) | 109 V(F32x4Ge) |
110 | 110 |
111 #define FOREACH_INT32X4_TO_SIMD1X4OPCODE(V) \ | 111 #define FOREACH_INT32X4_TO_SIMD1X4OPCODE(V) \ |
112 V(Int32x4Equal) \ | 112 V(I32x4Eq) \ |
113 V(Int32x4NotEqual) \ | 113 V(I32x4Ne) \ |
114 V(Int32x4LessThan) \ | 114 V(I32x4LtS) \ |
115 V(Int32x4LessThanOrEqual) \ | 115 V(I32x4LeS) \ |
116 V(Int32x4GreaterThan) \ | 116 V(I32x4GtS) \ |
117 V(Int32x4GreaterThanOrEqual) \ | 117 V(I32x4GeS) \ |
118 V(Uint32x4LessThan) \ | 118 V(I32x4LtU) \ |
119 V(Uint32x4LessThanOrEqual) \ | 119 V(I32x4LeU) \ |
120 V(Uint32x4GreaterThan) \ | 120 V(I32x4GtU) \ |
121 V(Uint32x4GreaterThanOrEqual) | 121 V(I32x4GeU) |
122 | 122 |
123 void SimdScalarLowering::SetLoweredType(Node* node, Node* output) { | 123 void SimdScalarLowering::SetLoweredType(Node* node, Node* output) { |
124 switch (node->opcode()) { | 124 switch (node->opcode()) { |
125 #define CASE_STMT(name) case IrOpcode::k##name: | 125 #define CASE_STMT(name) case IrOpcode::k##name: |
126 FOREACH_INT32X4_OPCODE(CASE_STMT) | 126 FOREACH_INT32X4_OPCODE(CASE_STMT) |
127 case IrOpcode::kReturn: | 127 case IrOpcode::kReturn: |
128 case IrOpcode::kParameter: | 128 case IrOpcode::kParameter: |
129 case IrOpcode::kCall: { | 129 case IrOpcode::kCall: { |
130 replacements_[node->id()].type = SimdType::kInt32; | 130 replacements_[node->id()].type = SimdType::kInt32; |
131 break; | 131 break; |
132 } | 132 } |
133 FOREACH_FLOAT32X4_OPCODE(CASE_STMT) { | 133 FOREACH_FLOAT32X4_OPCODE(CASE_STMT) { |
134 replacements_[node->id()].type = SimdType::kFloat32; | 134 replacements_[node->id()].type = SimdType::kFloat32; |
135 break; | 135 break; |
136 } | 136 } |
137 FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(CASE_STMT) | 137 FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(CASE_STMT) |
138 FOREACH_INT32X4_TO_SIMD1X4OPCODE(CASE_STMT) { | 138 FOREACH_INT32X4_TO_SIMD1X4OPCODE(CASE_STMT) { |
139 replacements_[node->id()].type = SimdType::kSimd1x4; | 139 replacements_[node->id()].type = SimdType::kSimd1x4; |
140 break; | 140 break; |
141 } | 141 } |
142 default: { | 142 default: { |
143 switch (output->opcode()) { | 143 switch (output->opcode()) { |
144 FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(CASE_STMT) | 144 FOREACH_FLOAT32X4_TO_SIMD1X4OPCODE(CASE_STMT) |
145 case IrOpcode::kFloat32x4FromInt32x4: | 145 case IrOpcode::kF32x4SConvertI32x4: |
146 case IrOpcode::kFloat32x4FromUint32x4: { | 146 case IrOpcode::kF32x4UConvertI32x4: { |
147 replacements_[node->id()].type = SimdType::kInt32; | 147 replacements_[node->id()].type = SimdType::kInt32; |
148 break; | 148 break; |
149 } | 149 } |
150 FOREACH_INT32X4_TO_SIMD1X4OPCODE(CASE_STMT) | 150 FOREACH_INT32X4_TO_SIMD1X4OPCODE(CASE_STMT) |
151 case IrOpcode::kInt32x4FromFloat32x4: | 151 case IrOpcode::kI32x4SConvertF32x4: |
152 case IrOpcode::kUint32x4FromFloat32x4: { | 152 case IrOpcode::kI32x4UConvertF32x4: { |
153 replacements_[node->id()].type = SimdType::kFloat32; | 153 replacements_[node->id()].type = SimdType::kFloat32; |
154 break; | 154 break; |
155 } | 155 } |
156 case IrOpcode::kSimd32x4Select: { | 156 case IrOpcode::kS32x4Select: { |
157 replacements_[node->id()].type = SimdType::kSimd1x4; | 157 replacements_[node->id()].type = SimdType::kSimd1x4; |
158 break; | 158 break; |
159 } | 159 } |
160 default: { | 160 default: { |
161 replacements_[node->id()].type = replacements_[output->id()].type; | 161 replacements_[node->id()].type = replacements_[output->id()].type; |
162 } | 162 } |
163 } | 163 } |
164 } | 164 } |
165 #undef CASE_STMT | 165 #undef CASE_STMT |
166 } | 166 } |
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566 } else { | 566 } else { |
567 DefaultLowering(node); | 567 DefaultLowering(node); |
568 } | 568 } |
569 break; | 569 break; |
570 } | 570 } |
571 #define I32X4_BINOP_CASE(opcode, instruction) \ | 571 #define I32X4_BINOP_CASE(opcode, instruction) \ |
572 case IrOpcode::opcode: { \ | 572 case IrOpcode::opcode: { \ |
573 LowerBinaryOp(node, rep_type, machine()->instruction()); \ | 573 LowerBinaryOp(node, rep_type, machine()->instruction()); \ |
574 break; \ | 574 break; \ |
575 } | 575 } |
576 I32X4_BINOP_CASE(kInt32x4Add, Int32Add) | 576 I32X4_BINOP_CASE(kI32x4Add, Int32Add) |
577 I32X4_BINOP_CASE(kInt32x4Sub, Int32Sub) | 577 I32X4_BINOP_CASE(kI32x4Sub, Int32Sub) |
578 I32X4_BINOP_CASE(kInt32x4Mul, Int32Mul) | 578 I32X4_BINOP_CASE(kI32x4Mul, Int32Mul) |
579 I32X4_BINOP_CASE(kSimd128And, Word32And) | 579 I32X4_BINOP_CASE(kS128And, Word32And) |
580 I32X4_BINOP_CASE(kSimd128Or, Word32Or) | 580 I32X4_BINOP_CASE(kS128Or, Word32Or) |
581 I32X4_BINOP_CASE(kSimd128Xor, Word32Xor) | 581 I32X4_BINOP_CASE(kS128Xor, Word32Xor) |
582 #undef I32X4_BINOP_CASE | 582 #undef I32X4_BINOP_CASE |
583 case IrOpcode::kInt32x4Max: { | 583 case IrOpcode::kI32x4MaxS: { |
584 LowerIntMinMax(node, machine()->Int32LessThan(), true); | 584 LowerIntMinMax(node, machine()->Int32LessThan(), true); |
585 break; | 585 break; |
586 } | 586 } |
587 case IrOpcode::kInt32x4Min: { | 587 case IrOpcode::kI32x4MinS: { |
588 LowerIntMinMax(node, machine()->Int32LessThan(), false); | 588 LowerIntMinMax(node, machine()->Int32LessThan(), false); |
589 break; | 589 break; |
590 } | 590 } |
591 case IrOpcode::kUint32x4Max: { | 591 case IrOpcode::kI32x4MaxU: { |
592 LowerIntMinMax(node, machine()->Uint32LessThan(), true); | 592 LowerIntMinMax(node, machine()->Uint32LessThan(), true); |
593 break; | 593 break; |
594 } | 594 } |
595 case IrOpcode::kUint32x4Min: { | 595 case IrOpcode::kI32x4MinU: { |
596 LowerIntMinMax(node, machine()->Uint32LessThan(), false); | 596 LowerIntMinMax(node, machine()->Uint32LessThan(), false); |
597 break; | 597 break; |
598 } | 598 } |
599 case IrOpcode::kInt32x4Neg: { | 599 case IrOpcode::kI32x4Neg: { |
600 DCHECK(node->InputCount() == 1); | 600 DCHECK(node->InputCount() == 1); |
601 Node** rep = GetReplacementsWithType(node->InputAt(0), rep_type); | 601 Node** rep = GetReplacementsWithType(node->InputAt(0), rep_type); |
602 Node* rep_node[kMaxLanes]; | 602 Node* rep_node[kMaxLanes]; |
603 Node* zero = graph()->NewNode(common()->Int32Constant(0)); | 603 Node* zero = graph()->NewNode(common()->Int32Constant(0)); |
604 for (int i = 0; i < kMaxLanes; ++i) { | 604 for (int i = 0; i < kMaxLanes; ++i) { |
605 rep_node[i] = graph()->NewNode(machine()->Int32Sub(), zero, rep[i]); | 605 rep_node[i] = graph()->NewNode(machine()->Int32Sub(), zero, rep[i]); |
606 } | 606 } |
607 ReplaceNode(node, rep_node); | 607 ReplaceNode(node, rep_node); |
608 break; | 608 break; |
609 } | 609 } |
610 case IrOpcode::kSimd128Not: { | 610 case IrOpcode::kS128Not: { |
611 DCHECK(node->InputCount() == 1); | 611 DCHECK(node->InputCount() == 1); |
612 Node** rep = GetReplacementsWithType(node->InputAt(0), rep_type); | 612 Node** rep = GetReplacementsWithType(node->InputAt(0), rep_type); |
613 Node* rep_node[kMaxLanes]; | 613 Node* rep_node[kMaxLanes]; |
614 Node* mask = graph()->NewNode(common()->Int32Constant(0xffffffff)); | 614 Node* mask = graph()->NewNode(common()->Int32Constant(0xffffffff)); |
615 for (int i = 0; i < kMaxLanes; ++i) { | 615 for (int i = 0; i < kMaxLanes; ++i) { |
616 rep_node[i] = graph()->NewNode(machine()->Word32Xor(), rep[i], mask); | 616 rep_node[i] = graph()->NewNode(machine()->Word32Xor(), rep[i], mask); |
617 } | 617 } |
618 ReplaceNode(node, rep_node); | 618 ReplaceNode(node, rep_node); |
619 break; | 619 break; |
620 } | 620 } |
621 case IrOpcode::kInt32x4FromFloat32x4: { | 621 case IrOpcode::kI32x4SConvertF32x4: { |
622 LowerConvertFromFloat(node, true); | 622 LowerConvertFromFloat(node, true); |
623 break; | 623 break; |
624 } | 624 } |
625 case IrOpcode::kUint32x4FromFloat32x4: { | 625 case IrOpcode::kI32x4UConvertF32x4: { |
626 LowerConvertFromFloat(node, false); | 626 LowerConvertFromFloat(node, false); |
627 break; | 627 break; |
628 } | 628 } |
629 case IrOpcode::kInt32x4ShiftLeftByScalar: { | 629 case IrOpcode::kI32x4Shl: { |
630 LowerShiftOp(node, machine()->Word32Shl()); | 630 LowerShiftOp(node, machine()->Word32Shl()); |
631 break; | 631 break; |
632 } | 632 } |
633 case IrOpcode::kInt32x4ShiftRightByScalar: { | 633 case IrOpcode::kI32x4ShrS: { |
634 LowerShiftOp(node, machine()->Word32Sar()); | 634 LowerShiftOp(node, machine()->Word32Sar()); |
635 break; | 635 break; |
636 } | 636 } |
637 case IrOpcode::kUint32x4ShiftRightByScalar: { | 637 case IrOpcode::kI32x4ShrU: { |
638 LowerShiftOp(node, machine()->Word32Shr()); | 638 LowerShiftOp(node, machine()->Word32Shr()); |
639 break; | 639 break; |
640 } | 640 } |
641 #define F32X4_BINOP_CASE(name) \ | 641 #define F32X4_BINOP_CASE(name) \ |
642 case IrOpcode::kFloat32x4##name: { \ | 642 case IrOpcode::kF32x4##name: { \ |
643 LowerBinaryOp(node, rep_type, machine()->Float32##name()); \ | 643 LowerBinaryOp(node, rep_type, machine()->Float32##name()); \ |
644 break; \ | 644 break; \ |
645 } | 645 } |
646 F32X4_BINOP_CASE(Add) | 646 F32X4_BINOP_CASE(Add) |
647 F32X4_BINOP_CASE(Sub) | 647 F32X4_BINOP_CASE(Sub) |
648 F32X4_BINOP_CASE(Mul) | 648 F32X4_BINOP_CASE(Mul) |
649 F32X4_BINOP_CASE(Div) | 649 F32X4_BINOP_CASE(Div) |
650 F32X4_BINOP_CASE(Min) | 650 F32X4_BINOP_CASE(Min) |
651 F32X4_BINOP_CASE(Max) | 651 F32X4_BINOP_CASE(Max) |
652 #undef F32X4_BINOP_CASE | 652 #undef F32X4_BINOP_CASE |
653 #define F32X4_UNOP_CASE(name) \ | 653 #define F32X4_UNOP_CASE(name) \ |
654 case IrOpcode::kFloat32x4##name: { \ | 654 case IrOpcode::kF32x4##name: { \ |
655 LowerUnaryOp(node, rep_type, machine()->Float32##name()); \ | 655 LowerUnaryOp(node, rep_type, machine()->Float32##name()); \ |
656 break; \ | 656 break; \ |
657 } | 657 } |
658 F32X4_UNOP_CASE(Abs) | 658 F32X4_UNOP_CASE(Abs) |
659 F32X4_UNOP_CASE(Neg) | 659 F32X4_UNOP_CASE(Neg) |
660 F32X4_UNOP_CASE(Sqrt) | 660 F32X4_UNOP_CASE(Sqrt) |
661 #undef F32x4_UNOP_CASE | 661 #undef F32x4_UNOP_CASE |
662 case IrOpcode::kFloat32x4FromInt32x4: { | 662 case IrOpcode::kF32x4SConvertI32x4: { |
663 LowerUnaryOp(node, SimdType::kInt32, machine()->RoundInt32ToFloat32()); | 663 LowerUnaryOp(node, SimdType::kInt32, machine()->RoundInt32ToFloat32()); |
664 break; | 664 break; |
665 } | 665 } |
666 case IrOpcode::kFloat32x4FromUint32x4: { | 666 case IrOpcode::kF32x4UConvertI32x4: { |
667 LowerUnaryOp(node, SimdType::kInt32, machine()->RoundUint32ToFloat32()); | 667 LowerUnaryOp(node, SimdType::kInt32, machine()->RoundUint32ToFloat32()); |
668 break; | 668 break; |
669 } | 669 } |
670 case IrOpcode::kInt32x4Splat: | 670 case IrOpcode::kI32x4Splat: |
671 case IrOpcode::kFloat32x4Splat: { | 671 case IrOpcode::kF32x4Splat: { |
672 Node* rep_node[kMaxLanes]; | 672 Node* rep_node[kMaxLanes]; |
673 for (int i = 0; i < kMaxLanes; ++i) { | 673 for (int i = 0; i < kMaxLanes; ++i) { |
674 if (HasReplacement(0, node->InputAt(0))) { | 674 if (HasReplacement(0, node->InputAt(0))) { |
675 rep_node[i] = GetReplacements(node->InputAt(0))[0]; | 675 rep_node[i] = GetReplacements(node->InputAt(0))[0]; |
676 } else { | 676 } else { |
677 rep_node[i] = node->InputAt(0); | 677 rep_node[i] = node->InputAt(0); |
678 } | 678 } |
679 } | 679 } |
680 ReplaceNode(node, rep_node); | 680 ReplaceNode(node, rep_node); |
681 break; | 681 break; |
682 } | 682 } |
683 case IrOpcode::kInt32x4ExtractLane: | 683 case IrOpcode::kI32x4ExtractLane: |
684 case IrOpcode::kFloat32x4ExtractLane: { | 684 case IrOpcode::kF32x4ExtractLane: { |
685 int32_t lane = OpParameter<int32_t>(node); | 685 int32_t lane = OpParameter<int32_t>(node); |
686 Node* rep_node[kMaxLanes] = { | 686 Node* rep_node[kMaxLanes] = { |
687 GetReplacementsWithType(node->InputAt(0), rep_type)[lane], nullptr, | 687 GetReplacementsWithType(node->InputAt(0), rep_type)[lane], nullptr, |
688 nullptr, nullptr}; | 688 nullptr, nullptr}; |
689 ReplaceNode(node, rep_node); | 689 ReplaceNode(node, rep_node); |
690 break; | 690 break; |
691 } | 691 } |
692 case IrOpcode::kInt32x4ReplaceLane: | 692 case IrOpcode::kI32x4ReplaceLane: |
693 case IrOpcode::kFloat32x4ReplaceLane: { | 693 case IrOpcode::kF32x4ReplaceLane: { |
694 DCHECK_EQ(2, node->InputCount()); | 694 DCHECK_EQ(2, node->InputCount()); |
695 Node* repNode = node->InputAt(1); | 695 Node* repNode = node->InputAt(1); |
696 int32_t lane = OpParameter<int32_t>(node); | 696 int32_t lane = OpParameter<int32_t>(node); |
697 DCHECK(lane >= 0 && lane <= 3); | 697 DCHECK(lane >= 0 && lane <= 3); |
698 Node** rep_node = GetReplacementsWithType(node->InputAt(0), rep_type); | 698 Node** rep_node = GetReplacementsWithType(node->InputAt(0), rep_type); |
699 if (HasReplacement(0, repNode)) { | 699 if (HasReplacement(0, repNode)) { |
700 rep_node[lane] = GetReplacements(repNode)[0]; | 700 rep_node[lane] = GetReplacements(repNode)[0]; |
701 } else { | 701 } else { |
702 rep_node[lane] = repNode; | 702 rep_node[lane] = repNode; |
703 } | 703 } |
704 ReplaceNode(node, rep_node); | 704 ReplaceNode(node, rep_node); |
705 break; | 705 break; |
706 } | 706 } |
707 #define COMPARISON_CASE(type, simd_op, lowering_op, invert) \ | 707 #define COMPARISON_CASE(type, simd_op, lowering_op, invert) \ |
708 case IrOpcode::simd_op: { \ | 708 case IrOpcode::simd_op: { \ |
709 LowerBinaryOp(node, SimdType::k##type, machine()->lowering_op(), invert); \ | 709 LowerBinaryOp(node, SimdType::k##type, machine()->lowering_op(), invert); \ |
710 break; \ | 710 break; \ |
711 } | 711 } |
712 COMPARISON_CASE(Float32, kFloat32x4Equal, Float32Equal, false) | 712 COMPARISON_CASE(Float32, kF32x4Eq, Float32Equal, false) |
713 COMPARISON_CASE(Float32, kFloat32x4LessThan, Float32LessThan, false) | 713 COMPARISON_CASE(Float32, kF32x4Lt, Float32LessThan, false) |
714 COMPARISON_CASE(Float32, kFloat32x4LessThanOrEqual, | 714 COMPARISON_CASE(Float32, kF32x4Le, Float32LessThanOrEqual, false) |
715 Float32LessThanOrEqual, false) | 715 COMPARISON_CASE(Float32, kF32x4Gt, Float32LessThan, true) |
716 COMPARISON_CASE(Float32, kFloat32x4GreaterThan, Float32LessThan, true) | 716 COMPARISON_CASE(Float32, kF32x4Ge, Float32LessThanOrEqual, true) |
717 COMPARISON_CASE(Float32, kFloat32x4GreaterThanOrEqual, | 717 COMPARISON_CASE(Int32, kI32x4Eq, Word32Equal, false) |
718 Float32LessThanOrEqual, true) | 718 COMPARISON_CASE(Int32, kI32x4LtS, Int32LessThan, false) |
719 COMPARISON_CASE(Int32, kInt32x4Equal, Word32Equal, false) | 719 COMPARISON_CASE(Int32, kI32x4LeS, Int32LessThanOrEqual, false) |
720 COMPARISON_CASE(Int32, kInt32x4LessThan, Int32LessThan, false) | 720 COMPARISON_CASE(Int32, kI32x4GtS, Int32LessThan, true) |
721 COMPARISON_CASE(Int32, kInt32x4LessThanOrEqual, Int32LessThanOrEqual, | 721 COMPARISON_CASE(Int32, kI32x4GeS, Int32LessThanOrEqual, true) |
722 false) | 722 COMPARISON_CASE(Int32, kI32x4LtU, Uint32LessThan, false) |
723 COMPARISON_CASE(Int32, kInt32x4GreaterThan, Int32LessThan, true) | 723 COMPARISON_CASE(Int32, kI32x4LeU, Uint32LessThanOrEqual, false) |
724 COMPARISON_CASE(Int32, kInt32x4GreaterThanOrEqual, Int32LessThanOrEqual, | 724 COMPARISON_CASE(Int32, kI32x4GtU, Uint32LessThan, true) |
725 true) | 725 COMPARISON_CASE(Int32, kI32x4GeU, Uint32LessThanOrEqual, true) |
726 COMPARISON_CASE(Int32, kUint32x4LessThan, Uint32LessThan, false) | |
727 COMPARISON_CASE(Int32, kUint32x4LessThanOrEqual, Uint32LessThanOrEqual, | |
728 false) | |
729 COMPARISON_CASE(Int32, kUint32x4GreaterThan, Uint32LessThan, true) | |
730 COMPARISON_CASE(Int32, kUint32x4GreaterThanOrEqual, Uint32LessThanOrEqual, | |
731 true) | |
732 #undef COMPARISON_CASE | 726 #undef COMPARISON_CASE |
733 case IrOpcode::kFloat32x4NotEqual: { | 727 case IrOpcode::kF32x4Ne: { |
734 LowerNotEqual(node, SimdType::kFloat32, machine()->Float32Equal()); | 728 LowerNotEqual(node, SimdType::kFloat32, machine()->Float32Equal()); |
735 break; | 729 break; |
736 } | 730 } |
737 case IrOpcode::kInt32x4NotEqual: { | 731 case IrOpcode::kI32x4Ne: { |
738 LowerNotEqual(node, SimdType::kInt32, machine()->Word32Equal()); | 732 LowerNotEqual(node, SimdType::kInt32, machine()->Word32Equal()); |
739 break; | 733 break; |
740 } | 734 } |
741 case IrOpcode::kSimd32x4Select: { | 735 case IrOpcode::kS32x4Select: { |
742 DCHECK(node->InputCount() == 3); | 736 DCHECK(node->InputCount() == 3); |
743 DCHECK(ReplacementType(node->InputAt(0)) == SimdType::kSimd1x4); | 737 DCHECK(ReplacementType(node->InputAt(0)) == SimdType::kSimd1x4); |
744 Node** boolean_input = GetReplacements(node->InputAt(0)); | 738 Node** boolean_input = GetReplacements(node->InputAt(0)); |
745 Node** rep_left = GetReplacementsWithType(node->InputAt(1), rep_type); | 739 Node** rep_left = GetReplacementsWithType(node->InputAt(1), rep_type); |
746 Node** rep_right = GetReplacementsWithType(node->InputAt(2), rep_type); | 740 Node** rep_right = GetReplacementsWithType(node->InputAt(2), rep_type); |
747 Node* rep_node[kMaxLanes]; | 741 Node* rep_node[kMaxLanes]; |
748 for (int i = 0; i < kMaxLanes; ++i) { | 742 for (int i = 0; i < kMaxLanes; ++i) { |
749 Diamond d(graph(), common(), | 743 Diamond d(graph(), common(), |
750 graph()->NewNode(machine()->Word32Equal(), boolean_input[i], | 744 graph()->NewNode(machine()->Word32Equal(), boolean_input[i], |
751 jsgraph_->Int32Constant(0))); | 745 jsgraph_->Int32Constant(0))); |
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871 } else { | 865 } else { |
872 UNREACHABLE(); | 866 UNREACHABLE(); |
873 } | 867 } |
874 } | 868 } |
875 ReplaceNode(phi, rep_nodes); | 869 ReplaceNode(phi, rep_nodes); |
876 } | 870 } |
877 } | 871 } |
878 } // namespace compiler | 872 } // namespace compiler |
879 } // namespace internal | 873 } // namespace internal |
880 } // namespace v8 | 874 } // namespace v8 |
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