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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 | 6 |
7 #include <limits> | 7 #include <limits> |
8 | 8 |
9 #include "src/compilation-info.h" | 9 #include "src/compilation-info.h" |
10 #include "src/compiler/code-generator-impl.h" | 10 #include "src/compiler/code-generator-impl.h" |
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2135 break; | 2135 break; |
2136 case kX64Poke: { | 2136 case kX64Poke: { |
2137 int const slot = MiscField::decode(instr->opcode()); | 2137 int const slot = MiscField::decode(instr->opcode()); |
2138 if (HasImmediateInput(instr, 0)) { | 2138 if (HasImmediateInput(instr, 0)) { |
2139 __ movq(Operand(rsp, slot * kPointerSize), i.InputImmediate(0)); | 2139 __ movq(Operand(rsp, slot * kPointerSize), i.InputImmediate(0)); |
2140 } else { | 2140 } else { |
2141 __ movq(Operand(rsp, slot * kPointerSize), i.InputRegister(0)); | 2141 __ movq(Operand(rsp, slot * kPointerSize), i.InputRegister(0)); |
2142 } | 2142 } |
2143 break; | 2143 break; |
2144 } | 2144 } |
2145 case kX64Int32x4Splat: { | 2145 case kX64I32x4Splat: { |
2146 XMMRegister dst = i.OutputSimd128Register(); | 2146 XMMRegister dst = i.OutputSimd128Register(); |
2147 __ movd(dst, i.InputRegister(0)); | 2147 __ movd(dst, i.InputRegister(0)); |
2148 __ pshufd(dst, dst, 0x0); | 2148 __ pshufd(dst, dst, 0x0); |
2149 break; | 2149 break; |
2150 } | 2150 } |
2151 case kX64Int32x4ExtractLane: { | 2151 case kX64I32x4ExtractLane: { |
2152 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2152 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2153 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); | 2153 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); |
2154 break; | 2154 break; |
2155 } | 2155 } |
2156 case kX64Int32x4ReplaceLane: { | 2156 case kX64I32x4ReplaceLane: { |
2157 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2157 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2158 if (instr->InputAt(2)->IsRegister()) { | 2158 if (instr->InputAt(2)->IsRegister()) { |
2159 __ Pinsrd(i.OutputSimd128Register(), i.InputRegister(2), | 2159 __ Pinsrd(i.OutputSimd128Register(), i.InputRegister(2), |
2160 i.InputInt8(1)); | 2160 i.InputInt8(1)); |
2161 } else { | 2161 } else { |
2162 __ Pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); | 2162 __ Pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); |
2163 } | 2163 } |
2164 break; | 2164 break; |
2165 } | 2165 } |
2166 case kX64Int32x4Add: { | 2166 case kX64I32x4Add: { |
2167 __ paddd(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2167 __ paddd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2168 break; | 2168 break; |
2169 } | 2169 } |
2170 case kX64Int32x4Sub: { | 2170 case kX64I32x4Sub: { |
2171 __ psubd(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2171 __ psubd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2172 break; | 2172 break; |
2173 } | 2173 } |
2174 case kX64Int32x4Mul: { | 2174 case kX64I32x4Mul: { |
2175 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2175 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2176 __ pmulld(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2176 __ pmulld(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2177 break; | 2177 break; |
2178 } | 2178 } |
2179 case kX64Int32x4Min: { | 2179 case kX64I32x4MinS: { |
2180 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2180 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2181 __ pminsd(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2181 __ pminsd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2182 break; | 2182 break; |
2183 } | 2183 } |
2184 case kX64Int32x4Max: { | 2184 case kX64I32x4MaxS: { |
2185 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2185 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2186 __ pmaxsd(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2186 __ pmaxsd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2187 break; | 2187 break; |
2188 } | 2188 } |
2189 case kX64Uint32x4Min: { | 2189 case kX64I32x4Shl: { |
2190 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2190 __ pslld(i.OutputSimd128Register(), i.InputInt8(1)); |
2191 __ pminud(i.OutputSimd128Register(), i.InputSimd128Register(1)); | |
2192 break; | 2191 break; |
2193 } | 2192 } |
2194 case kX64Uint32x4Max: { | 2193 case kX64I32x4ShrS: { |
2195 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2194 __ psrad(i.OutputSimd128Register(), i.InputInt8(1)); |
2196 __ pmaxud(i.OutputSimd128Register(), i.InputSimd128Register(1)); | |
2197 break; | 2195 break; |
2198 } | 2196 } |
2199 case kX64Int32x4Equal: { | 2197 case kX64I32x4Eq: { |
2200 __ pcmpeqd(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2198 __ pcmpeqd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2201 break; | 2199 break; |
2202 } | 2200 } |
2203 case kX64Int32x4NotEqual: { | 2201 case kX64I32x4Ne: { |
2204 __ pcmpeqd(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2202 __ pcmpeqd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2205 __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg); | 2203 __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg); |
2206 __ pxor(i.OutputSimd128Register(), kScratchDoubleReg); | 2204 __ pxor(i.OutputSimd128Register(), kScratchDoubleReg); |
2207 break; | 2205 break; |
2208 } | 2206 } |
2209 case kX64Int32x4ShiftLeftByScalar: { | 2207 case kX64I32x4MinU: { |
2210 __ pslld(i.OutputSimd128Register(), i.InputInt8(1)); | 2208 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2209 __ pminud(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2211 break; | 2210 break; |
2212 } | 2211 } |
2213 case kX64Int32x4ShiftRightByScalar: { | 2212 case kX64I32x4MaxU: { |
2214 __ psrad(i.OutputSimd128Register(), i.InputInt8(1)); | 2213 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2214 __ pmaxud(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2215 break; | 2215 break; |
2216 } | 2216 } |
2217 case kX64Uint32x4ShiftRightByScalar: { | 2217 case kX64I32x4ShrU: { |
2218 __ psrld(i.OutputSimd128Register(), i.InputInt8(1)); | 2218 __ psrld(i.OutputSimd128Register(), i.InputInt8(1)); |
2219 break; | 2219 break; |
2220 } | 2220 } |
2221 case kX64Simd32x4Select: { | 2221 case kX64S128Zero: { |
| 2222 XMMRegister dst = i.OutputSimd128Register(); |
| 2223 __ xorps(dst, dst); |
| 2224 break; |
| 2225 } |
| 2226 case kX64S32x4Select: { |
2222 // Mask used here is stored in dst. | 2227 // Mask used here is stored in dst. |
2223 XMMRegister dst = i.OutputSimd128Register(); | 2228 XMMRegister dst = i.OutputSimd128Register(); |
2224 __ movaps(kScratchDoubleReg, i.InputSimd128Register(1)); | 2229 __ movaps(kScratchDoubleReg, i.InputSimd128Register(1)); |
2225 __ xorps(kScratchDoubleReg, i.InputSimd128Register(2)); | 2230 __ xorps(kScratchDoubleReg, i.InputSimd128Register(2)); |
2226 __ andps(dst, kScratchDoubleReg); | 2231 __ andps(dst, kScratchDoubleReg); |
2227 __ xorps(dst, i.InputSimd128Register(2)); | 2232 __ xorps(dst, i.InputSimd128Register(2)); |
2228 break; | 2233 break; |
2229 } | 2234 } |
2230 case kX64Simd128Zero: { | |
2231 XMMRegister dst = i.OutputSimd128Register(); | |
2232 __ xorps(dst, dst); | |
2233 break; | |
2234 } | |
2235 case kCheckedLoadInt8: | 2235 case kCheckedLoadInt8: |
2236 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl); | 2236 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl); |
2237 break; | 2237 break; |
2238 case kCheckedLoadUint8: | 2238 case kCheckedLoadUint8: |
2239 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl); | 2239 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl); |
2240 break; | 2240 break; |
2241 case kCheckedLoadInt16: | 2241 case kCheckedLoadInt16: |
2242 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl); | 2242 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl); |
2243 break; | 2243 break; |
2244 case kCheckedLoadUint16: | 2244 case kCheckedLoadUint16: |
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2963 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc; | 2963 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc; |
2964 __ Nop(padding_size); | 2964 __ Nop(padding_size); |
2965 } | 2965 } |
2966 } | 2966 } |
2967 | 2967 |
2968 #undef __ | 2968 #undef __ |
2969 | 2969 |
2970 } // namespace compiler | 2970 } // namespace compiler |
2971 } // namespace internal | 2971 } // namespace internal |
2972 } // namespace v8 | 2972 } // namespace v8 |
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