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Issue 2775413002: PPC: Declare X format assembler function with opcode list macro (Closed)
Patch Set: Created 3 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_PPC_CONSTANTS_PPC_H_ 5 #ifndef V8_PPC_CONSTANTS_PPC_H_
6 #define V8_PPC_CONSTANTS_PPC_H_ 6 #define V8_PPC_CONSTANTS_PPC_H_
7 7
8 #include <stdint.h> 8 #include <stdint.h>
9 9
10 #include "src/base/logging.h" 10 #include "src/base/logging.h"
(...skipping 1059 matching lines...) Expand 10 before | Expand all | Expand 10 after
1070 V(vcmpgtsw, VCMPGTSW, 0x10000386) \ 1070 V(vcmpgtsw, VCMPGTSW, 0x10000386) \
1071 /* Vector Compare Greater Than Unsigned Byte */ \ 1071 /* Vector Compare Greater Than Unsigned Byte */ \
1072 V(vcmpgtub, VCMPGTUB, 0x10000206) \ 1072 V(vcmpgtub, VCMPGTUB, 0x10000206) \
1073 /* Vector Compare Greater Than Unsigned Doubleword */ \ 1073 /* Vector Compare Greater Than Unsigned Doubleword */ \
1074 V(vcmpgtud, VCMPGTUD, 0x100002C7) \ 1074 V(vcmpgtud, VCMPGTUD, 0x100002C7) \
1075 /* Vector Compare Greater Than Unsigned Halfword */ \ 1075 /* Vector Compare Greater Than Unsigned Halfword */ \
1076 V(vcmpgtuh, VCMPGTUH, 0x10000246) \ 1076 V(vcmpgtuh, VCMPGTUH, 0x10000246) \
1077 /* Vector Compare Greater Than Unsigned Word */ \ 1077 /* Vector Compare Greater Than Unsigned Word */ \
1078 V(vcmpgtuw, VCMPGTUW, 0x10000286) 1078 V(vcmpgtuw, VCMPGTUW, 0x10000286)
1079 1079
1080 #define PPC_X_OPCODE_LIST(V) \ 1080 #define PPC_X_OPCODE_A_FORM_LIST(V) \
1081 /* Bit Permute Doubleword */ \
1082 V(bpermd, BPERMD, 0x7C0001F8) \
1083 /* Count Leading Zeros Doubleword */ \
1084 V(cntlzd, CNTLZDX, 0x7C000074) \
1085 /* Extend Sign Word */ \
1086 V(extsw, EXTSW, 0x7C0007B4) \
1087 /* Load Doubleword And Reserve Indexed */ \
1088 V(ldarx, LDARX, 0x7C0000A8) \
1089 /* Load Doubleword Byte-Reverse Indexed */ \
1090 V(ldbrx, LDBRX, 0x7C000428) \
1091 /* Load Doubleword with Update Indexed */ \
1092 V(ldux, LDUX, 0x7C00006A) \
1093 /* Load Doubleword Indexed */ \
1094 V(ldx, LDX, 0x7C00002A) \
1095 /* Load Word Algebraic with Update Indexed */ \
1096 V(lwaux, LWAUX, 0x7C0002EA) \
1097 /* Load Word Algebraic Indexed */ \
1098 V(lwax, LWAX, 0x7C0002AA) \
1099 /* Modulo Signed Dword */ \ 1081 /* Modulo Signed Dword */ \
1100 V(modsd, MODSD, 0x7C000612) \ 1082 V(modsd, MODSD, 0x7C000612) \
1101 /* Modulo Unsigned Dword */ \ 1083 /* Modulo Unsigned Dword */ \
1102 V(modud, MODUD, 0x7C000212) \ 1084 V(modud, MODUD, 0x7C000212) \
1103 /* Population Count Doubleword */ \ 1085 /* Modulo Signed Word */ \
1104 V(popcntd, POPCNTD, 0x7C0003F4) \ 1086 V(modsw, MODSW, 0x7C000616) \
1105 /* Parity Doubleword */ \ 1087 /* Modulo Unsigned Word */ \
1106 V(prtyd, PRTYD, 0x7C000174) \ 1088 V(moduw, MODUW, 0x7C000216) \
1089
1090 #define PPC_X_OPCODE_B_FORM_LIST(V) \
1091 /* XOR */ \
1092 V(xor_, XORX, 0x7C000278) \
1093 /* AND */ \
1094 V(and_, ANDX, 0x7C000038) \
1095 /* AND with Complement */ \
1096 V(andc, ANDCX, 0x7C000078) \
1097 /* OR */ \
1098 V(orx, ORX, 0x7C000378) \
1099 /* OR with Complement */ \
1100 V(orc, ORC, 0x7C000338) \
1101 /* NOR */ \
1102 V(nor, NORX, 0x7C0000F8) \
1103 /* Shift Right Word */ \
1104 V(srw, SRWX, 0x7C000430) \
1105 /* Shift Left Word */ \
1106 V(slw, SLWX, 0x7C000030) \
1107 /* Shift Right Algebraic Word */ \
1108 V(sraw, SRAW, 0x7C000630) \
1107 /* Shift Left Doubleword */ \ 1109 /* Shift Left Doubleword */ \
1108 V(sld, SLDX, 0x7C000036) \ 1110 V(sld, SLDX, 0x7C000036) \
1109 /* Shift Right Algebraic Doubleword */ \ 1111 /* Shift Right Algebraic Doubleword */ \
1110 V(srad, SRAD, 0x7C000634) \ 1112 V(srad, SRAD, 0x7C000634) \
1111 /* Shift Right Doubleword */ \ 1113 /* Shift Right Doubleword */ \
1112 V(srd, SRDX, 0x7C000436) \ 1114 V(srd, SRDX, 0x7C000436) \
1115
1116 #define PPC_X_OPCODE_C_FORM_LIST(V) \
1117 /* Count Leading Zeros Word */ \
1118 V(cntlzw, CNTLZWX, 0x7C000034) \
1119 /* Count Leading Zeros Doubleword */ \
1120 V(cntlzd, CNTLZDX, 0x7C000074) \
1121 /* Population Count Byte-wise */ \
1122 V(popcntb, POPCNTB, 0x7C0000F4) \
1123 /* Population Count Words */ \
1124 V(popcntw, POPCNTW, 0x7C0002F4) \
1125 /* Population Count Doubleword */ \
1126 V(popcntd, POPCNTD, 0x7C0003F4) \
1127 /* Extend Sign Byte */ \
1128 V(extsb, EXTSB, 0x7C000774) \
1129 /* Extend Sign Halfword */ \
1130 V(extsh, EXTSH, 0x7C000734) \
1131
1132 #define PPC_X_OPCODE_D_FORM_LIST(V) \
1133 /* Load Halfword Byte-Reverse Indexed */ \
1134 V(lhbrx, LHBRX, 0x7C00062C) \
1135 /* Load Word Byte-Reverse Indexed */ \
1136 V(lwbrx, LWBRX, 0x7C00042C) \
1137 /* Load Doubleword Byte-Reverse Indexed */ \
1138 V(ldbrx, LDBRX, 0x7C000428) \
1139 /* Load Byte and Zero Indexed */ \
1140 V(lbzx, LBZX, 0x7C0000AE) \
1141 /* Load Byte and Zero with Update Indexed */ \
1142 V(lbzux, LBZUX, 0x7C0000EE) \
1143 /* Load Halfword and Zero Indexed */ \
1144 V(lhzx, LHZX, 0x7C00022E) \
1145 /* Load Halfword and Zero with Update Indexed */ \
1146 V(lhzux, LHZUX, 0x7C00026E) \
1147 /* Load Halfword Algebraic Indexed */ \
1148 V(lhax, LHAX, 0x7C0002AE) \
1149 /* Load Word and Zero Indexed */ \
1150 V(lwzx, LWZX, 0x7C00002E) \
1151 /* Load Word and Zero with Update Indexed */ \
1152 V(lwzux, LWZUX, 0x7C00006E) \
1153 /* Load Doubleword Indexed */ \
1154 V(ldx, LDX, 0x7C00002A) \
1155 /* Load Doubleword with Update Indexed */ \
1156 V(ldux, LDUX, 0x7C00006A) \
1157 /* Load Floating-Point Double Indexed */ \
1158 V(lfdx, LFDX, 0x7C0004AE) \
1159 /* Load Floating-Point Single Indexed */ \
1160 V(lfsx, LFSX, 0x7C00042E) \
1161 /* Load Floating-Point Double with Update Indexed */ \
1162 V(lfdux, LFDUX, 0x7C0004EE) \
1163 /* Load Floating-Point Single with Update Indexed */ \
1164 V(lfsux, LFSUX, 0x7C00046E) \
1165 /* Store Byte with Update Indexed */ \
1166 V(stbux, STBUX, 0x7C0001EE) \
1167 /* Store Byte Indexed */ \
1168 V(stbx, STBX, 0x7C0001AE) \
1169 /* Store Halfword with Update Indexed */ \
1170 V(sthux, STHUX, 0x7C00036E) \
1171 /* Store Halfword Indexed */ \
1172 V(sthx, STHX, 0x7C00032E) \
1173 /* Store Word with Update Indexed */ \
1174 V(stwux, STWUX, 0x7C00016E) \
1175 /* Store Word Indexed */ \
1176 V(stwx, STWX, 0x7C00012E) \
1177 /* Store Doubleword with Update Indexed */ \
1178 V(stdux, STDUX, 0x7C00016A) \
1179 /* Store Doubleword Indexed */ \
1180 V(stdx, STDX, 0x7C00012A) \
1181 /* Store Floating-Point Double with Update Indexed */ \
1182 V(stfdux, STFDUX, 0x7C0005EE) \
1183 /* Store Floating-Point Double Indexed */ \
1184 V(stfdx, STFDX, 0x7C0005AE) \
1185 /* Store Floating-Point Single with Update Indexed */ \
1186 V(stfsux, STFSUX, 0x7C00056E) \
1187 /* Store Floating-Point Single Indexed */ \
1188 V(stfsx, STFSX, 0x7C00052E) \
1189
1190 #define PPC_X_OPCODE_E_FORM_LIST(V) \
1191 /* Shift Right Algebraic Word Immediate */ \
1192 V(srawi, SRAWIX, 0x7C000670) \
1193
1194 #define PPC_X_OPCODE_F_FORM_LIST(V) \
1195 /* Compare */ \
1196 V(cmp, CMP, 0x7C000000) \
1197 /* Compare Logical */ \
1198 V(cmpl, CMPL, 0x7C000040) \
1199
1200 #define PPC_X_OPCODE_UNUSED_LIST(V) \
1201 /* Bit Permute Doubleword */ \
1202 V(bpermd, BPERMD, 0x7C0001F8) \
1203 /* Extend Sign Word */ \
1204 V(extsw, EXTSW, 0x7C0007B4) \
1205 /* Load Doubleword And Reserve Indexed */ \
1206 V(ldarx, LDARX, 0x7C0000A8) \
1207 /* Load Word Algebraic with Update Indexed */ \
1208 V(lwaux, LWAUX, 0x7C0002EA) \
1209 /* Load Word Algebraic Indexed */ \
1210 V(lwax, LWAX, 0x7C0002AA) \
1211 /* Parity Doubleword */ \
1212 V(prtyd, PRTYD, 0x7C000174) \
1113 /* Store Doubleword Byte-Reverse Indexed */ \ 1213 /* Store Doubleword Byte-Reverse Indexed */ \
1114 V(stdbrx, STDBRX, 0x7C000528) \ 1214 V(stdbrx, STDBRX, 0x7C000528) \
1115 /* Store Doubleword Conditional Indexed & record CR0 */ \ 1215 /* Store Doubleword Conditional Indexed & record CR0 */ \
1116 V(stdcx, STDCX, 0x7C0001AD) \ 1216 V(stdcx, STDCX, 0x7C0001AD) \
1117 /* Store Doubleword with Update Indexed */ \
1118 V(stdux, STDUX, 0x7C00016A) \
1119 /* Store Doubleword Indexed */ \
1120 V(stdx, STDX, 0x7C00012A) \
1121 /* Trap Doubleword */ \ 1217 /* Trap Doubleword */ \
1122 V(td, TD, 0x7C000088) \ 1218 V(td, TD, 0x7C000088) \
1123 /* AND */ \
1124 V(andx, ANDX, 0x7C000038) \
1125 /* AND with Complement */ \
1126 V(andc, ANDCX, 0x7C000078) \
1127 /* Branch Conditional to Branch Target Address Register */ \ 1219 /* Branch Conditional to Branch Target Address Register */ \
1128 V(bctar, BCTAR, 0x4C000460) \ 1220 V(bctar, BCTAR, 0x4C000460) \
1129 /* Compare */ \
1130 V(cmp, CMP, 0x7C000000) \
1131 /* Compare Byte */ \ 1221 /* Compare Byte */ \
1132 V(cmpb, CMPB, 0x7C0003F8) \ 1222 V(cmpb, CMPB, 0x7C0003F8) \
1133 /* Compare Logical */ \
1134 V(cmpl, CMPL, 0x7C000040) \
1135 /* Count Leading Zeros Word */ \
1136 V(cntlzw, CNTLZWX, 0x7C000034) \
1137 /* Data Cache Block Flush */ \ 1223 /* Data Cache Block Flush */ \
1138 V(dcbf, DCBF, 0x7C0000AC) \ 1224 V(dcbf, DCBF, 0x7C0000AC) \
1139 /* Data Cache Block Store */ \ 1225 /* Data Cache Block Store */ \
1140 V(dcbst, DCBST, 0x7C00006C) \ 1226 V(dcbst, DCBST, 0x7C00006C) \
1141 /* Data Cache Block Touch */ \ 1227 /* Data Cache Block Touch */ \
1142 V(dcbt, DCBT, 0x7C00022C) \ 1228 V(dcbt, DCBT, 0x7C00022C) \
1143 /* Data Cache Block Touch for Store */ \ 1229 /* Data Cache Block Touch for Store */ \
1144 V(dcbtst, DCBTST, 0x7C0001EC) \ 1230 V(dcbtst, DCBTST, 0x7C0001EC) \
1145 /* Data Cache Block Zero */ \ 1231 /* Data Cache Block Zero */ \
1146 V(dcbz, DCBZ, 0x7C0007EC) \ 1232 V(dcbz, DCBZ, 0x7C0007EC) \
1147 /* Equivalent */ \ 1233 /* Equivalent */ \
1148 V(eqv, EQV, 0x7C000238) \ 1234 V(eqv, EQV, 0x7C000238) \
1149 /* Extend Sign Byte */ \
1150 V(extsb, EXTSB, 0x7C000774) \
1151 /* Extend Sign Halfword */ \
1152 V(extsh, EXTSH, 0x7C000734) \
1153 /* Instruction Cache Block Invalidate */ \ 1235 /* Instruction Cache Block Invalidate */ \
1154 V(icbi, ICBI, 0x7C0007AC) \ 1236 V(icbi, ICBI, 0x7C0007AC) \
1155 /* Load Byte And Reserve Indexed */ \ 1237 /* Load Byte And Reserve Indexed */ \
1156 V(lbarx, LBARX, 0x7C000068) \ 1238 V(lbarx, LBARX, 0x7C000068) \
1157 /* Load Byte and Zero with Update Indexed */ \
1158 V(lbzux, LBZUX, 0x7C0000EE) \
1159 /* Load Byte and Zero Indexed */ \
1160 V(lbzx, LBZX, 0x7C0000AE) \
1161 /* Load Halfword And Reserve Indexed Xform */ \ 1239 /* Load Halfword And Reserve Indexed Xform */ \
1162 V(lharx, LHARX, 0x7C0000E8) \ 1240 V(lharx, LHARX, 0x7C0000E8) \
1163 /* Load Halfword Algebraic with Update Indexed */ \ 1241 /* Load Halfword Algebraic with Update Indexed */ \
1164 V(lhaux, LHAUX, 0x7C0002EE) \ 1242 V(lhaux, LHAUX, 0x7C0002EE) \
1165 /* Load Halfword Algebraic Indexed */ \
1166 V(lhax, LHAX, 0x7C0002AE) \
1167 /* Load Halfword Byte-Reverse Indexed */ \
1168 V(lhbrx, LHBRX, 0x7C00062C) \
1169 /* Load Halfword and Zero with Update Indexed */ \
1170 V(lhzux, LHZUX, 0x7C00026E) \
1171 /* Load Halfword and Zero Indexed */ \
1172 V(lhzx, LHZX, 0x7C00022E) \
1173 /* Load Word and Reserve Indexed */ \ 1243 /* Load Word and Reserve Indexed */ \
1174 V(lwarx, LWARX, 0x7C000028) \ 1244 V(lwarx, LWARX, 0x7C000028) \
1175 /* Load Word Byte-Reverse Indexed */ \
1176 V(lwbrx, LWBRX, 0x7C00042C) \
1177 /* Load Word and Zero with Update Indexed */ \
1178 V(lwzux, LWZUX, 0x7C00006E) \
1179 /* Load Word and Zero Indexed */ \
1180 V(lwzx, LWZX, 0x7C00002E) \
1181 /* Modulo Signed Word */ \
1182 V(mods, MODSW, 0x7C000616) \
1183 /* Modulo Unsigned Word */ \
1184 V(moduw, MODUW, 0x7C000216) \
1185 /* NAND */ \ 1245 /* NAND */ \
1186 V(nand, NAND, 0x7C0003B8) \ 1246 V(nand, NAND, 0x7C0003B8) \
1187 /* NOR */ \
1188 V(nor, NORX, 0x7C0000F8) \
1189 /* OR */ \
1190 V(orx, ORX, 0x7C000378) \
1191 /* OR with Complement */ \
1192 V(orc, ORC, 0x7C000338) \
1193 /* Population Count Byte-wise */ \
1194 V(popcntb, POPCNTB, 0x7C0000F4) \
1195 /* Population Count Words */ \
1196 V(popcntw, POPCNTW, 0x7C0002F4) \
1197 /* Parity Word */ \ 1247 /* Parity Word */ \
1198 V(prtyw, PRTYW, 0x7C000134) \ 1248 V(prtyw, PRTYW, 0x7C000134) \
1199 /* Shift Left Word */ \
1200 V(slw, SLWX, 0x7C000030) \
1201 /* Shift Right Algebraic Word */ \
1202 V(sraw, SRAW, 0x7C000630) \
1203 /* Shift Right Algebraic Word Immediate */ \
1204 V(srawi, SRAWIX, 0x7C000670) \
1205 /* Shift Right Word */ \
1206 V(srw, SRWX, 0x7C000430) \
1207 /* Store Byte Conditional Indexed */ \ 1249 /* Store Byte Conditional Indexed */ \
1208 V(stbcx, STBCX, 0x7C00056D) \ 1250 V(stbcx, STBCX, 0x7C00056D) \
1209 /* Store Byte with Update Indexed */ \
1210 V(stbux, STBUX, 0x7C0001EE) \
1211 /* Store Byte Indexed */ \
1212 V(stbx, STBX, 0x7C0001AE) \
1213 /* Store Halfword Byte-Reverse Indexed */ \ 1251 /* Store Halfword Byte-Reverse Indexed */ \
1214 V(sthbrx, STHBRX, 0x7C00072C) \ 1252 V(sthbrx, STHBRX, 0x7C00072C) \
1215 /* Store Halfword Conditional Indexed Xform */ \ 1253 /* Store Halfword Conditional Indexed Xform */ \
1216 V(sthcx, STHCX, 0x7C0005AD) \ 1254 V(sthcx, STHCX, 0x7C0005AD) \
1217 /* Store Halfword with Update Indexed */ \
1218 V(sthux, STHUX, 0x7C00036E) \
1219 /* Store Halfword Indexed */ \
1220 V(sthx, STHX, 0x7C00032E) \
1221 /* Store Word Byte-Reverse Indexed */ \ 1255 /* Store Word Byte-Reverse Indexed */ \
1222 V(stwbrx, STWBRX, 0x7C00052C) \ 1256 V(stwbrx, STWBRX, 0x7C00052C) \
1223 /* Store Word Conditional Indexed & record CR0 */ \ 1257 /* Store Word Conditional Indexed & record CR0 */ \
1224 V(stwcx, STWCX, 0x7C00012D) \ 1258 V(stwcx, STWCX, 0x7C00012D) \
1225 /* Store Word with Update Indexed */ \
1226 V(stwux, STWUX, 0x7C00016E) \
1227 /* Store Word Indexed */ \
1228 V(stwx, STWX, 0x7C00012E) \
1229 /* Synchronize */ \ 1259 /* Synchronize */ \
1230 V(sync, SYNC, 0x7C0004AC) \ 1260 V(sync, SYNC, 0x7C0004AC) \
1231 /* Trap Word */ \ 1261 /* Trap Word */ \
1232 V(tw, TW, 0x7C000008) \ 1262 V(tw, TW, 0x7C000008) \
1233 /* ExecuExecuted No Operation */ \ 1263 /* ExecuExecuted No Operation */ \
1234 V(xnop, XNOP, 0x68000000) \ 1264 V(xnop, XNOP, 0x68000000) \
1235 /* XOR */ \
1236 V(xorx, XORX, 0x7C000278) \
1237 /* Convert Binary Coded Decimal To Declets */ \ 1265 /* Convert Binary Coded Decimal To Declets */ \
1238 V(cbcdtd, CBCDTD, 0x7C000274) \ 1266 V(cbcdtd, CBCDTD, 0x7C000274) \
1239 /* Convert Declets To Binary Coded Decimal */ \ 1267 /* Convert Declets To Binary Coded Decimal */ \
1240 V(cdtbcd, CDTBCD, 0x7C000234) \ 1268 V(cdtbcd, CDTBCD, 0x7C000234) \
1241 /* Decimal Floating Add */ \ 1269 /* Decimal Floating Add */ \
1242 V(dadd, DADD, 0xEC000004) \ 1270 V(dadd, DADD, 0xEC000004) \
1243 /* Decimal Floating Add Quad */ \ 1271 /* Decimal Floating Add Quad */ \
1244 V(daddq, DADDQ, 0xFC000004) \ 1272 V(daddq, DADDQ, 0xFC000004) \
1245 /* Decimal Floating Convert From Fixed */ \ 1273 /* Decimal Floating Convert From Fixed */ \
1246 V(dcffix, DCFFIX, 0xEC000644) \ 1274 V(dcffix, DCFFIX, 0xEC000644) \
(...skipping 178 matching lines...) Expand 10 before | Expand all | Expand 10 after
1425 /* Instruction Cache Block Touch and Lock Set */ \ 1453 /* Instruction Cache Block Touch and Lock Set */ \
1426 V(icbtls, ICBTLS, 0x7C0003CC) \ 1454 V(icbtls, ICBTLS, 0x7C0003CC) \
1427 /* Floating Compare Ordered */ \ 1455 /* Floating Compare Ordered */ \
1428 V(fcmpo, FCMPO, 0xFC000040) \ 1456 V(fcmpo, FCMPO, 0xFC000040) \
1429 /* Floating Compare Unordered */ \ 1457 /* Floating Compare Unordered */ \
1430 V(fcmpu, FCMPU, 0xFC000000) \ 1458 V(fcmpu, FCMPU, 0xFC000000) \
1431 /* Floating Test for software Divide */ \ 1459 /* Floating Test for software Divide */ \
1432 V(ftdiv, FTDIV, 0xFC000100) \ 1460 V(ftdiv, FTDIV, 0xFC000100) \
1433 /* Floating Test for software Square Root */ \ 1461 /* Floating Test for software Square Root */ \
1434 V(ftsqrt, FTSQRT, 0xFC000140) \ 1462 V(ftsqrt, FTSQRT, 0xFC000140) \
1435 /* Load Floating-Point Double with Update Indexed */ \
1436 V(lfdux, LFDUX, 0x7C0004EE) \
1437 /* Load Floating-Point Double Indexed */ \
1438 V(lfdx, LFDX, 0x7C0004AE) \
1439 /* Load Floating-Point as Integer Word Algebraic Indexed */ \ 1463 /* Load Floating-Point as Integer Word Algebraic Indexed */ \
1440 V(lfiwax, LFIWAX, 0x7C0006AE) \ 1464 V(lfiwax, LFIWAX, 0x7C0006AE) \
1441 /* Load Floating-Point as Integer Word and Zero Indexed */ \ 1465 /* Load Floating-Point as Integer Word and Zero Indexed */ \
1442 V(lfiwzx, LFIWZX, 0x7C0006EE) \ 1466 V(lfiwzx, LFIWZX, 0x7C0006EE) \
1443 /* Load Floating-Point Single with Update Indexed */ \
1444 V(lfsux, LFSUX, 0x7C00046E) \
1445 /* Load Floating-Point Single Indexed */ \
1446 V(lfsx, LFSX, 0x7C00042E) \
1447 /* Move To Condition Register from FPSCR */ \ 1467 /* Move To Condition Register from FPSCR */ \
1448 V(mcrfs, MCRFS, 0xFC000080) \ 1468 V(mcrfs, MCRFS, 0xFC000080) \
1449 /* Store Floating-Point Double with Update Indexed */ \
1450 V(stfdux, STFDUX, 0x7C0005EE) \
1451 /* Store Floating-Point Double Indexed */ \
1452 V(stfdx, STFDX, 0x7C0005AE) \
1453 /* Store Floating-Point as Integer Word Indexed */ \ 1469 /* Store Floating-Point as Integer Word Indexed */ \
1454 V(stfiwx, STFIWX, 0x7C0007AE) \ 1470 V(stfiwx, STFIWX, 0x7C0007AE) \
1455 /* Store Floating-Point Single with Update Indexed */ \
1456 V(stfsux, STFSUX, 0x7C00056E) \
1457 /* Store Floating-Point Single Indexed */ \
1458 V(stfsx, STFSX, 0x7C00052E) \
1459 /* Load Floating-Point Double Pair Indexed */ \ 1471 /* Load Floating-Point Double Pair Indexed */ \
1460 V(lfdpx, LFDPX, 0x7C00062E) \ 1472 V(lfdpx, LFDPX, 0x7C00062E) \
1461 /* Store Floating-Point Double Pair Indexed */ \ 1473 /* Store Floating-Point Double Pair Indexed */ \
1462 V(stfdpx, STFDPX, 0x7C00072E) \ 1474 V(stfdpx, STFDPX, 0x7C00072E) \
1463 /* Floating Absolute Value */ \ 1475 /* Floating Absolute Value */ \
1464 V(fabs, FABS, 0xFC000210) \ 1476 V(fabs, FABS, 0xFC000210) \
1465 /* Floating Convert From Integer Doubleword */ \ 1477 /* Floating Convert From Integer Doubleword */ \
1466 V(fcfid, FCFID, 0xFC00069C) \ 1478 V(fcfid, FCFID, 0xFC00069C) \
1467 /* Floating Convert From Integer Doubleword Single */ \ 1479 /* Floating Convert From Integer Doubleword Single */ \
1468 V(fcfids, FCFIDS, 0xEC00069C) \ 1480 V(fcfids, FCFIDS, 0xEC00069C) \
(...skipping 182 matching lines...) Expand 10 before | Expand all | Expand 10 after
1651 V(stvxl, STVXL, 0x7C0003CE) \ 1663 V(stvxl, STVXL, 0x7C0003CE) \
1652 /* Vector Minimum Signed Doubleword */ \ 1664 /* Vector Minimum Signed Doubleword */ \
1653 V(vminsd, VMINSD, 0x100003C2) \ 1665 V(vminsd, VMINSD, 0x100003C2) \
1654 /* Floating Merge Even Word */ \ 1666 /* Floating Merge Even Word */ \
1655 V(fmrgew, FMRGEW, 0xFC00078C) \ 1667 V(fmrgew, FMRGEW, 0xFC00078C) \
1656 /* Floating Merge Odd Word */ \ 1668 /* Floating Merge Odd Word */ \
1657 V(fmrgow, FMRGOW, 0xFC00068C) \ 1669 V(fmrgow, FMRGOW, 0xFC00068C) \
1658 /* Wait for Interrupt */ \ 1670 /* Wait for Interrupt */ \
1659 V(wait, WAIT, 0x7C00007C) 1671 V(wait, WAIT, 0x7C00007C)
1660 1672
1673 #define PPC_X_OPCODE_LIST(V) \
1674 PPC_X_OPCODE_A_FORM_LIST(V) \
1675 PPC_X_OPCODE_B_FORM_LIST(V) \
1676 PPC_X_OPCODE_C_FORM_LIST(V) \
1677 PPC_X_OPCODE_D_FORM_LIST(V) \
1678 PPC_X_OPCODE_E_FORM_LIST(V) \
1679 PPC_X_OPCODE_F_FORM_LIST(V) \
1680 PPC_X_OPCODE_UNUSED_LIST(V)
1681
1682
1661 #define PPC_EVS_OPCODE_LIST(V) \ 1683 #define PPC_EVS_OPCODE_LIST(V) \
1662 /* Vector Select */ \ 1684 /* Vector Select */ \
1663 V(evsel, EVSEL, 0x10000278) 1685 V(evsel, EVSEL, 0x10000278)
1664 1686
1665 #define PPC_DS_OPCODE_LIST(V) \ 1687 #define PPC_DS_OPCODE_LIST(V) \
1666 /* Load Doubleword */ \ 1688 /* Load Doubleword */ \
1667 V(ld, LD, 0xE8000000) \ 1689 V(ld, LD, 0xE8000000) \
1668 /* Load Doubleword with Update */ \ 1690 /* Load Doubleword with Update */ \
1669 V(ldu, LDU, 0xE8000001) \ 1691 V(ldu, LDU, 0xE8000001) \
1670 /* Load Word Algebraic */ \ 1692 /* Load Word Algebraic */ \
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2868 opcode = extcode | BitField(1, 0); 2890 opcode = extcode | BitField(1, 0);
2869 switch (opcode) { 2891 switch (opcode) {
2870 PPC_DS_OPCODE_LIST(OPCODE_CASES) 2892 PPC_DS_OPCODE_LIST(OPCODE_CASES)
2871 return static_cast<Opcode>(opcode); 2893 return static_cast<Opcode>(opcode);
2872 } 2894 }
2873 opcode = extcode | BitField(1, 1); 2895 opcode = extcode | BitField(1, 1);
2874 switch (opcode) { 2896 switch (opcode) {
2875 PPC_SC_OPCODE_LIST(OPCODE_CASES) 2897 PPC_SC_OPCODE_LIST(OPCODE_CASES)
2876 return static_cast<Opcode>(opcode); 2898 return static_cast<Opcode>(opcode);
2877 } 2899 }
2878 printf("opcode = %x\n", InstructionBits());
2879 UNIMPLEMENTED(); 2900 UNIMPLEMENTED();
2880 return static_cast<Opcode>(0); 2901 return static_cast<Opcode>(0);
2881 } 2902 }
2882 2903
2883 #undef OPCODE_CASES 2904 #undef OPCODE_CASES
2884 2905
2885 // Fields used in Software interrupt instructions 2906 // Fields used in Software interrupt instructions
2886 inline SoftwareInterruptCodes SvcValue() const { 2907 inline SoftwareInterruptCodes SvcValue() const {
2887 return static_cast<SoftwareInterruptCodes>(Bits(23, 0)); 2908 return static_cast<SoftwareInterruptCodes>(Bits(23, 0));
2888 } 2909 }
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2918 // Lookup the register number for the name provided. 2939 // Lookup the register number for the name provided.
2919 static int Number(const char* name); 2940 static int Number(const char* name);
2920 2941
2921 private: 2942 private:
2922 static const char* names_[kNumDoubleRegisters]; 2943 static const char* names_[kNumDoubleRegisters];
2923 }; 2944 };
2924 } // namespace internal 2945 } // namespace internal
2925 } // namespace v8 2946 } // namespace v8
2926 2947
2927 #endif // V8_PPC_CONSTANTS_PPC_H_ 2948 #endif // V8_PPC_CONSTANTS_PPC_H_
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