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Issue 277033003: Modify pnacl subzero to be able to read pnacl bitcode files. (Closed) Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 6 years, 7 months ago
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1 ; RUIN: %llvm2ice %s | FileCheck %s 1 ; RUIN: %llvm2ice %s | FileCheck %s
2 ; RUIN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s 2 ; RUIN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s
3 ; RUN: %szdiff --llvm2ice=%llvm2ice %s | FileCheck --check-prefix=DUMP %s 3 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s
4 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \
5 ; RUN: | FileCheck --check-prefix=DUMP %s
4 6
5 @i8v = common global i8 0, align 1 7 @i8v = global [1 x i8] zeroinitializer, align 1
6 @i16v = common global i16 0, align 2 8 @i16v = global [2 x i8] zeroinitializer, align 2
7 @i32v = common global i32 0, align 4 9 @i32v = global [4 x i8] zeroinitializer, align 4
8 @i64v = common global i64 0, align 8 10 @i64v = global [8 x i8] zeroinitializer, align 8
9 @u8v = common global i8 0, align 1 11 @u8v = global [1 x i8] zeroinitializer, align 1
10 @u16v = common global i16 0, align 2 12 @u16v = global [2 x i8] zeroinitializer, align 2
11 @u32v = common global i32 0, align 4 13 @u32v = global [4 x i8] zeroinitializer, align 4
12 @u64v = common global i64 0, align 8 14 @u64v = global [8 x i8] zeroinitializer, align 8
13 @i1 = common global i32 0, align 4
14 @i2 = common global i32 0, align 4
15 @u1 = common global i32 0, align 4
16 @u2 = common global i32 0, align 4
17 15
18 define void @from_int8() { 16 define void @from_int8() {
19 entry: 17 entry:
20 %v0 = load i8* @i8v, align 1 18 %__0 = bitcast [1 x i8]* @i8v to i8*
19 %v0 = load i8* %__0, align 1
21 %v1 = sext i8 %v0 to i16 20 %v1 = sext i8 %v0 to i16
22 store i16 %v1, i16* @i16v, align 1 21 %__3 = bitcast [2 x i8]* @i16v to i16*
22 store i16 %v1, i16* %__3, align 1
23 %v2 = sext i8 %v0 to i32 23 %v2 = sext i8 %v0 to i32
24 store i32 %v2, i32* @i32v, align 1 24 %__5 = bitcast [4 x i8]* @i32v to i32*
25 store i32 %v2, i32* %__5, align 1
25 %v3 = sext i8 %v0 to i64 26 %v3 = sext i8 %v0 to i64
26 store i64 %v3, i64* @i64v, align 1 27 %__7 = bitcast [8 x i8]* @i64v to i64*
28 store i64 %v3, i64* %__7, align 1
27 ret void 29 ret void
28 ; CHECK: mov al, byte ptr [ 30 ; CHECK: mov al, byte ptr [
29 ; CHECK-NEXT: movsx cx, al 31 ; CHECK-NEXT: movsx cx, al
30 ; CHECK-NEXT: mov word ptr [ 32 ; CHECK-NEXT: mov word ptr [
31 ; CHECK-NEXT: movsx ecx, al 33 ; CHECK-NEXT: movsx ecx, al
32 ; CHECK-NEXT: mov dword ptr [ 34 ; CHECK-NEXT: mov dword ptr [
33 ; CHECK-NEXT: movsx ecx, al 35 ; CHECK-NEXT: movsx ecx, al
34 ; CHECK-NEXT: sar eax, 31 36 ; CHECK-NEXT: sar eax, 31
35 ; CHECK-NEXT: mov dword ptr [i64v+4], 37 ; CHECK-NEXT: mov dword ptr [i64v+4],
36 ; CHECK-NEXT: mov dword ptr [i64v], 38 ; CHECK-NEXT: mov dword ptr [i64v],
37 } 39 }
38 40
39 define void @from_int16() { 41 define void @from_int16() {
40 entry: 42 entry:
41 %v0 = load i16* @i16v, align 1 43 %__0 = bitcast [2 x i8]* @i16v to i16*
44 %v0 = load i16* %__0, align 1
42 %v1 = trunc i16 %v0 to i8 45 %v1 = trunc i16 %v0 to i8
43 store i8 %v1, i8* @i8v, align 1 46 %__3 = bitcast [1 x i8]* @i8v to i8*
47 store i8 %v1, i8* %__3, align 1
44 %v2 = sext i16 %v0 to i32 48 %v2 = sext i16 %v0 to i32
45 store i32 %v2, i32* @i32v, align 1 49 %__5 = bitcast [4 x i8]* @i32v to i32*
50 store i32 %v2, i32* %__5, align 1
46 %v3 = sext i16 %v0 to i64 51 %v3 = sext i16 %v0 to i64
47 store i64 %v3, i64* @i64v, align 1 52 %__7 = bitcast [8 x i8]* @i64v to i64*
53 store i64 %v3, i64* %__7, align 1
48 ret void 54 ret void
49 ; CHECK: mov ax, word ptr [ 55 ; CHECK: mov ax, word ptr [
50 ; CHECK-NEXT: mov cx, ax 56 ; CHECK-NEXT: mov cx, ax
51 ; CHECK-NEXT: mov byte ptr [ 57 ; CHECK-NEXT: mov byte ptr [
52 ; CHECK-NEXT: movsx ecx, ax 58 ; CHECK-NEXT: movsx ecx, ax
53 ; CHECK-NEXT: mov dword ptr [ 59 ; CHECK-NEXT: mov dword ptr [
54 ; CHECK-NEXT: movsx ecx, ax 60 ; CHECK-NEXT: movsx ecx, ax
55 ; CHECK-NEXT: sar eax, 31 61 ; CHECK-NEXT: sar eax, 31
56 ; CHECK-NEXT: mov dword ptr [i64v+4], 62 ; CHECK-NEXT: mov dword ptr [i64v+4],
57 ; CHECK-NEXT: mov dword ptr [i64v], 63 ; CHECK-NEXT: mov dword ptr [i64v],
58 } 64 }
59 65
60 define void @from_int32() { 66 define void @from_int32() {
61 entry: 67 entry:
62 %v0 = load i32* @i32v, align 1 68 %__0 = bitcast [4 x i8]* @i32v to i32*
69 %v0 = load i32* %__0, align 1
63 %v1 = trunc i32 %v0 to i8 70 %v1 = trunc i32 %v0 to i8
64 store i8 %v1, i8* @i8v, align 1 71 %__3 = bitcast [1 x i8]* @i8v to i8*
72 store i8 %v1, i8* %__3, align 1
65 %v2 = trunc i32 %v0 to i16 73 %v2 = trunc i32 %v0 to i16
66 store i16 %v2, i16* @i16v, align 1 74 %__5 = bitcast [2 x i8]* @i16v to i16*
75 store i16 %v2, i16* %__5, align 1
67 %v3 = sext i32 %v0 to i64 76 %v3 = sext i32 %v0 to i64
68 store i64 %v3, i64* @i64v, align 1 77 %__7 = bitcast [8 x i8]* @i64v to i64*
78 store i64 %v3, i64* %__7, align 1
69 ret void 79 ret void
70 ; CHECK: mov eax, dword ptr [ 80 ; CHECK: mov eax, dword ptr [
71 ; CHECK-NEXT: mov ecx, eax 81 ; CHECK-NEXT: mov ecx, eax
72 ; CHECK-NEXT: mov byte ptr [ 82 ; CHECK-NEXT: mov byte ptr [
73 ; CHECK-NEXT: mov ecx, eax 83 ; CHECK-NEXT: mov ecx, eax
74 ; CHECK-NEXT: mov word ptr [ 84 ; CHECK-NEXT: mov word ptr [
75 ; CHECK-NEXT: mov ecx, eax 85 ; CHECK-NEXT: mov ecx, eax
76 ; CHECK-NEXT: sar eax, 31 86 ; CHECK-NEXT: sar eax, 31
77 ; CHECK-NEXT: mov dword ptr [i64v+4], 87 ; CHECK-NEXT: mov dword ptr [i64v+4],
78 ; CHECK-NEXT: mov dword ptr [i64v], 88 ; CHECK-NEXT: mov dword ptr [i64v],
79 } 89 }
80 90
81 define void @from_int64() { 91 define void @from_int64() {
82 entry: 92 entry:
83 %v0 = load i64* @i64v, align 1 93 %__0 = bitcast [8 x i8]* @i64v to i64*
94 %v0 = load i64* %__0, align 1
84 %v1 = trunc i64 %v0 to i8 95 %v1 = trunc i64 %v0 to i8
85 store i8 %v1, i8* @i8v, align 1 96 %__3 = bitcast [1 x i8]* @i8v to i8*
97 store i8 %v1, i8* %__3, align 1
86 %v2 = trunc i64 %v0 to i16 98 %v2 = trunc i64 %v0 to i16
87 store i16 %v2, i16* @i16v, align 1 99 %__5 = bitcast [2 x i8]* @i16v to i16*
100 store i16 %v2, i16* %__5, align 1
88 %v3 = trunc i64 %v0 to i32 101 %v3 = trunc i64 %v0 to i32
89 store i32 %v3, i32* @i32v, align 1 102 %__7 = bitcast [4 x i8]* @i32v to i32*
103 store i32 %v3, i32* %__7, align 1
90 ret void 104 ret void
91 ; CHECK: mov eax, dword ptr [ 105 ; CHECK: mov eax, dword ptr [
92 ; CHECK-NEXT: mov ecx, eax 106 ; CHECK-NEXT: mov ecx, eax
93 ; CHECK-NEXT: mov byte ptr [ 107 ; CHECK-NEXT: mov byte ptr [
94 ; CHECK-NEXT: mov ecx, eax 108 ; CHECK-NEXT: mov ecx, eax
95 ; CHECK-NEXT: mov word ptr [ 109 ; CHECK-NEXT: mov word ptr [
96 ; CHECK-NEXT: mov dword ptr [ 110 ; CHECK-NEXT: mov dword ptr [
97 } 111 }
98 112
99 define void @from_uint8() { 113 define void @from_uint8() {
100 entry: 114 entry:
101 %v0 = load i8* @u8v, align 1 115 %__0 = bitcast [1 x i8]* @u8v to i8*
116 %v0 = load i8* %__0, align 1
102 %v1 = zext i8 %v0 to i16 117 %v1 = zext i8 %v0 to i16
103 store i16 %v1, i16* @i16v, align 1 118 %__3 = bitcast [2 x i8]* @i16v to i16*
119 store i16 %v1, i16* %__3, align 1
104 %v2 = zext i8 %v0 to i32 120 %v2 = zext i8 %v0 to i32
105 store i32 %v2, i32* @i32v, align 1 121 %__5 = bitcast [4 x i8]* @i32v to i32*
122 store i32 %v2, i32* %__5, align 1
106 %v3 = zext i8 %v0 to i64 123 %v3 = zext i8 %v0 to i64
107 store i64 %v3, i64* @i64v, align 1 124 %__7 = bitcast [8 x i8]* @i64v to i64*
125 store i64 %v3, i64* %__7, align 1
108 ret void 126 ret void
109 ; CHECK: mov al, byte ptr [ 127 ; CHECK: mov al, byte ptr [
110 ; CHECK-NEXT: movzx cx, al 128 ; CHECK-NEXT: movzx cx, al
111 ; CHECK-NEXT: mov word ptr [ 129 ; CHECK-NEXT: mov word ptr [
112 ; CHECK-NEXT: movzx ecx, al 130 ; CHECK-NEXT: movzx ecx, al
113 ; CHECK-NEXT: mov dword ptr [ 131 ; CHECK-NEXT: mov dword ptr [
114 ; CHECK-NEXT: movzx eax, al 132 ; CHECK-NEXT: movzx eax, al
115 ; CHECK-NEXT: mov ecx, 0 133 ; CHECK-NEXT: mov ecx, 0
116 ; CHECK-NEXT: mov dword ptr [i64v+4], 134 ; CHECK-NEXT: mov dword ptr [i64v+4],
117 ; CHECK-NEXT: mov dword ptr [i64v], 135 ; CHECK-NEXT: mov dword ptr [i64v],
118 } 136 }
119 137
120 define void @from_uint16() { 138 define void @from_uint16() {
121 entry: 139 entry:
122 %v0 = load i16* @u16v, align 1 140 %__0 = bitcast [2 x i8]* @u16v to i16*
141 %v0 = load i16* %__0, align 1
123 %v1 = trunc i16 %v0 to i8 142 %v1 = trunc i16 %v0 to i8
124 store i8 %v1, i8* @i8v, align 1 143 %__3 = bitcast [1 x i8]* @i8v to i8*
144 store i8 %v1, i8* %__3, align 1
125 %v2 = zext i16 %v0 to i32 145 %v2 = zext i16 %v0 to i32
126 store i32 %v2, i32* @i32v, align 1 146 %__5 = bitcast [4 x i8]* @i32v to i32*
147 store i32 %v2, i32* %__5, align 1
127 %v3 = zext i16 %v0 to i64 148 %v3 = zext i16 %v0 to i64
128 store i64 %v3, i64* @i64v, align 1 149 %__7 = bitcast [8 x i8]* @i64v to i64*
150 store i64 %v3, i64* %__7, align 1
129 ret void 151 ret void
130 ; CHECK: mov ax, word ptr [ 152 ; CHECK: mov ax, word ptr [
131 ; CHECK-NEXT: mov cx, ax 153 ; CHECK-NEXT: mov cx, ax
132 ; CHECK-NEXT: mov byte ptr [ 154 ; CHECK-NEXT: mov byte ptr [
133 ; CHECK-NEXT: movzx ecx, ax 155 ; CHECK-NEXT: movzx ecx, ax
134 ; CHECK-NEXT: mov dword ptr [ 156 ; CHECK-NEXT: mov dword ptr [
135 ; CHECK-NEXT: movzx eax, ax 157 ; CHECK-NEXT: movzx eax, ax
136 ; CHECK-NEXT: mov ecx, 0 158 ; CHECK-NEXT: mov ecx, 0
137 ; CHECK-NEXT: mov dword ptr [i64v+4], 159 ; CHECK-NEXT: mov dword ptr [i64v+4],
138 ; CHECK-NEXT: mov dword ptr [i64v], 160 ; CHECK-NEXT: mov dword ptr [i64v],
139 } 161 }
140 162
141 define void @from_uint32() { 163 define void @from_uint32() {
142 entry: 164 entry:
143 %v0 = load i32* @u32v, align 1 165 %__0 = bitcast [4 x i8]* @u32v to i32*
166 %v0 = load i32* %__0, align 1
144 %v1 = trunc i32 %v0 to i8 167 %v1 = trunc i32 %v0 to i8
145 store i8 %v1, i8* @i8v, align 1 168 %__3 = bitcast [1 x i8]* @i8v to i8*
169 store i8 %v1, i8* %__3, align 1
146 %v2 = trunc i32 %v0 to i16 170 %v2 = trunc i32 %v0 to i16
147 store i16 %v2, i16* @i16v, align 1 171 %__5 = bitcast [2 x i8]* @i16v to i16*
172 store i16 %v2, i16* %__5, align 1
148 %v3 = zext i32 %v0 to i64 173 %v3 = zext i32 %v0 to i64
149 store i64 %v3, i64* @i64v, align 1 174 %__7 = bitcast [8 x i8]* @i64v to i64*
175 store i64 %v3, i64* %__7, align 1
150 ret void 176 ret void
151 ; CHECK: mov eax, dword ptr [ 177 ; CHECK: mov eax, dword ptr [
152 ; CHECK-NEXT: mov ecx, eax 178 ; CHECK-NEXT: mov ecx, eax
153 ; CHECK-NEXT: mov byte ptr [ 179 ; CHECK-NEXT: mov byte ptr [
154 ; CHECK-NEXT: mov ecx, eax 180 ; CHECK-NEXT: mov ecx, eax
155 ; CHECK-NEXT: mov word ptr [ 181 ; CHECK-NEXT: mov word ptr [
156 ; CHECK-NEXT: mov ecx, 0 182 ; CHECK-NEXT: mov ecx, 0
157 ; CHECK-NEXT: mov dword ptr [i64v+4], 183 ; CHECK-NEXT: mov dword ptr [i64v+4],
158 ; CHECK-NEXT: mov dword ptr [i64v], 184 ; CHECK-NEXT: mov dword ptr [i64v],
159 } 185 }
160 186
161 define void @from_uint64() { 187 define void @from_uint64() {
162 entry: 188 entry:
163 %v0 = load i64* @u64v, align 1 189 %__0 = bitcast [8 x i8]* @u64v to i64*
190 %v0 = load i64* %__0, align 1
164 %v1 = trunc i64 %v0 to i8 191 %v1 = trunc i64 %v0 to i8
165 store i8 %v1, i8* @i8v, align 1 192 %__3 = bitcast [1 x i8]* @i8v to i8*
193 store i8 %v1, i8* %__3, align 1
166 %v2 = trunc i64 %v0 to i16 194 %v2 = trunc i64 %v0 to i16
167 store i16 %v2, i16* @i16v, align 1 195 %__5 = bitcast [2 x i8]* @i16v to i16*
196 store i16 %v2, i16* %__5, align 1
168 %v3 = trunc i64 %v0 to i32 197 %v3 = trunc i64 %v0 to i32
169 store i32 %v3, i32* @i32v, align 1 198 %__7 = bitcast [4 x i8]* @i32v to i32*
199 store i32 %v3, i32* %__7, align 1
170 ret void 200 ret void
171 ; CHECK: mov eax, dword ptr [ 201 ; CHECK: mov eax, dword ptr [
172 ; CHECK-NEXT: mov ecx, eax 202 ; CHECK-NEXT: mov ecx, eax
173 ; CHECK-NEXT: mov byte ptr [ 203 ; CHECK-NEXT: mov byte ptr [
174 ; CHECK-NEXT: mov ecx, eax 204 ; CHECK-NEXT: mov ecx, eax
175 ; CHECK-NEXT: mov word ptr [ 205 ; CHECK-NEXT: mov word ptr [
176 ; CHECK-NEXT: mov dword ptr [ 206 ; CHECK-NEXT: mov dword ptr [
177 } 207 }
178 208
179 ; ERRORS-NOT: ICE translation error 209 ; ERRORS-NOT: ICE translation error
180 ; DUMP-NOT: SZ 210 ; DUMP-NOT: SZ
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