Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(269)

Side by Side Diff: src/compiler/arm/instruction-codes-arm.h

Issue 2769723003: [arm][turbofan] Use NEON for unaligned float64 memory accesses (Closed)
Patch Set: Calculate the address separately Created 3 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/compiler/arm/code-generator-arm.cc ('k') | src/compiler/arm/instruction-scheduler-arm.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 86 matching lines...) Expand 10 before | Expand all | Expand 10 after
97 V(ArmVmovF32U32) \ 97 V(ArmVmovF32U32) \
98 V(ArmVmovLowU32F64) \ 98 V(ArmVmovLowU32F64) \
99 V(ArmVmovLowF64U32) \ 99 V(ArmVmovLowF64U32) \
100 V(ArmVmovHighU32F64) \ 100 V(ArmVmovHighU32F64) \
101 V(ArmVmovHighF64U32) \ 101 V(ArmVmovHighF64U32) \
102 V(ArmVmovF64U32U32) \ 102 V(ArmVmovF64U32U32) \
103 V(ArmVmovU32U32F64) \ 103 V(ArmVmovU32U32F64) \
104 V(ArmVldrF32) \ 104 V(ArmVldrF32) \
105 V(ArmVstrF32) \ 105 V(ArmVstrF32) \
106 V(ArmVldrF64) \ 106 V(ArmVldrF64) \
107 V(ArmVld1F64) \
107 V(ArmVstrF64) \ 108 V(ArmVstrF64) \
109 V(ArmVst1F64) \
108 V(ArmFloat32Max) \ 110 V(ArmFloat32Max) \
109 V(ArmFloat64Max) \ 111 V(ArmFloat64Max) \
110 V(ArmFloat32Min) \ 112 V(ArmFloat32Min) \
111 V(ArmFloat64Min) \ 113 V(ArmFloat64Min) \
112 V(ArmFloat64SilenceNaN) \ 114 V(ArmFloat64SilenceNaN) \
113 V(ArmLdrb) \ 115 V(ArmLdrb) \
114 V(ArmLdrsb) \ 116 V(ArmLdrsb) \
115 V(ArmStrb) \ 117 V(ArmStrb) \
116 V(ArmLdrh) \ 118 V(ArmLdrh) \
117 V(ArmLdrsh) \ 119 V(ArmLdrsh) \
(...skipping 123 matching lines...) Expand 10 before | Expand all | Expand 10 after
241 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ 243 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \
242 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ 244 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \
243 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ 245 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \
244 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ 246 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */
245 247
246 } // namespace compiler 248 } // namespace compiler
247 } // namespace internal 249 } // namespace internal
248 } // namespace v8 250 } // namespace v8
249 251
250 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 252 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
OLDNEW
« no previous file with comments | « src/compiler/arm/code-generator-arm.cc ('k') | src/compiler/arm/instruction-scheduler-arm.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698