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Issue 2769723003: [arm][turbofan] Use NEON for unaligned float64 memory accesses (Closed)
Patch Set: Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm/macro-assembler-arm.h" 7 #include "src/arm/macro-assembler-arm.h"
8 #include "src/assembler-inl.h" 8 #include "src/assembler-inl.h"
9 #include "src/compilation-info.h" 9 #include "src/compilation-info.h"
10 #include "src/compiler/code-generator-impl.h" 10 #include "src/compiler/code-generator-impl.h"
(...skipping 1425 matching lines...) Expand 10 before | Expand all | Expand 10 after
1436 break; 1436 break;
1437 case kArmVldrF32: { 1437 case kArmVldrF32: {
1438 __ vldr(i.OutputFloatRegister(), i.InputOffset()); 1438 __ vldr(i.OutputFloatRegister(), i.InputOffset());
1439 DCHECK_EQ(LeaveCC, i.OutputSBit()); 1439 DCHECK_EQ(LeaveCC, i.OutputSBit());
1440 break; 1440 break;
1441 } 1441 }
1442 case kArmVstrF32: 1442 case kArmVstrF32:
1443 __ vstr(i.InputFloatRegister(0), i.InputOffset(1)); 1443 __ vstr(i.InputFloatRegister(0), i.InputOffset(1));
1444 DCHECK_EQ(LeaveCC, i.OutputSBit()); 1444 DCHECK_EQ(LeaveCC, i.OutputSBit());
1445 break; 1445 break;
1446 case kArmVld1F64: {
1447 MemOperand src = i.InputOffset();
1448 __ vld1(NeonSize::Neon8, NeonListOperand(i.OutputDoubleRegister()),
1449 NeonMemOperand(src.rn(), src.rm()));
martyn.capewell 2017/03/23 11:11:53 I don't think this works, as the addressing mode t
1450 break;
1451 }
1452 case kArmVst1F64: {
1453 MemOperand src = i.InputOffset(1);
1454 __ vst1(Neon8, NeonListOperand(i.InputDoubleRegister(0)),
1455 NeonMemOperand(src.rn(), src.rm()));
1456 break;
1457 }
1446 case kArmVldrF64: 1458 case kArmVldrF64:
1447 __ vldr(i.OutputDoubleRegister(), i.InputOffset()); 1459 __ vldr(i.OutputDoubleRegister(), i.InputOffset());
1448 DCHECK_EQ(LeaveCC, i.OutputSBit()); 1460 DCHECK_EQ(LeaveCC, i.OutputSBit());
1449 break; 1461 break;
1450 case kArmVstrF64: 1462 case kArmVstrF64:
1451 __ vstr(i.InputDoubleRegister(0), i.InputOffset(1)); 1463 __ vstr(i.InputDoubleRegister(0), i.InputOffset(1));
1452 DCHECK_EQ(LeaveCC, i.OutputSBit()); 1464 DCHECK_EQ(LeaveCC, i.OutputSBit());
1453 break; 1465 break;
1454 case kArmFloat32Max: { 1466 case kArmFloat32Max: {
1455 SwVfpRegister result = i.OutputFloatRegister(); 1467 SwVfpRegister result = i.OutputFloatRegister();
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2782 padding_size -= v8::internal::Assembler::kInstrSize; 2794 padding_size -= v8::internal::Assembler::kInstrSize;
2783 } 2795 }
2784 } 2796 }
2785 } 2797 }
2786 2798
2787 #undef __ 2799 #undef __
2788 2800
2789 } // namespace compiler 2801 } // namespace compiler
2790 } // namespace internal 2802 } // namespace internal
2791 } // namespace v8 2803 } // namespace v8
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