[ARM] Make Simd 128 bit load/store more like existing load/store.

src/compiler/arm/code-generator-arm.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/arm/macro-assembler-arm.h"
 #include "src/assembler-inl.h"
 #include "src/compilation-info.h"
 #include "src/compiler/code-generator-impl.h"
@@ skipping 1426 matching lines @@
     case kArmVldrF32: {
       __ vldr(i.OutputFloatRegister(), i.InputOffset());
       DCHECK_EQ(LeaveCC, i.OutputSBit());
       break;
     }
     case kArmVstrF32:
       __ vstr(i.InputFloatRegister(0), i.InputOffset(1));
       DCHECK_EQ(LeaveCC, i.OutputSBit());
       break;
     case kArmVld1F64: {
-      __ vld1(NeonSize::Neon8, NeonListOperand(i.OutputDoubleRegister()),
+      __ vld1(Neon8, NeonListOperand(i.OutputDoubleRegister()),
               NeonMemOperand(i.InputRegister(0)));
       break;
     }
     case kArmVst1F64: {
       __ vst1(Neon8, NeonListOperand(i.InputDoubleRegister(0)),
               NeonMemOperand(i.InputRegister(1)));
       break;
     }
+    case kArmVld1S128: {
+      __ vld1(Neon8, NeonListOperand(i.OutputSimd128Register()),
+              NeonMemOperand(i.InputRegister(0)));
+      break;
+    }
+    case kArmVst1S128: {
+      __ vst1(Neon8, NeonListOperand(i.InputSimd128Register(0)),
+              NeonMemOperand(i.InputRegister(1)));
+      break;
+    }
     case kArmVldrF64:
       __ vldr(i.OutputDoubleRegister(), i.InputOffset());
       DCHECK_EQ(LeaveCC, i.OutputSBit());
       break;
     case kArmVstrF64:
       __ vstr(i.InputDoubleRegister(0), i.InputOffset(1));
       DCHECK_EQ(LeaveCC, i.OutputSBit());
       break;
     case kArmFloat32Max: {
       SwVfpRegister result = i.OutputFloatRegister();
@@ skipping 519 matching lines @@
     case kArmUint8x16LessThanOrEqual: {
       __ vcge(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(1),
               i.InputSimd128Register(0));
       break;
     }
     case kArmSimd128Zero: {
       __ veor(i.OutputSimd128Register(), i.OutputSimd128Register(),
               i.OutputSimd128Register());
       break;
     }
-    case kArmSimd128Load: {
-      MemOperand src = i.InputOffset();
-      __ vld1(Neon8, NeonListOperand(i.OutputSimd128Register()),
-              NeonMemOperand(src.rn(), src.rm()));
-      break;
-    }
-    case kArmSimd128Store: {
-      MemOperand src = i.InputOffset(1);
-      __ vst1(Neon8, NeonListOperand(i.InputSimd128Register(0)),
-              NeonMemOperand(src.rn(), src.rm()));
-      break;
-    }
     case kArmSimd128And: {
       __ vand(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));
       break;
     }
     case kArmSimd128Or: {
       __ vorr(i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));
       break;
     }
@@ skipping 816 matching lines @@
       padding_size -= v8::internal::Assembler::kInstrSize;
     }
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8