lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp - Issue 27690005: [MIPS] Modify LongBranch expansion to work with sandboxing

Side by Side Diff: lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp

Issue 27690005: [MIPS] Modify LongBranch expansion to work with sandboxing (Closed) Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master

Patch Set: Update. Created 7 years, 2 months ago

Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.

Jump to:

View unified diff | Download patch

OLD	NEW
1 //===-- MipsMCCodeEmitter.cpp - Convert Mips Code to Machine Code ---------===//	1 //===-- MipsMCCodeEmitter.cpp - Convert Mips Code to Machine Code ---------===//

2 //	2 //

3 // The LLVM Compiler Infrastructure	3 // The LLVM Compiler Infrastructure

4 //	4 //

5 // This file is distributed under the University of Illinois Open Source	5 // This file is distributed under the University of Illinois Open Source

6 // License. See LICENSE.TXT for details.	6 // License. See LICENSE.TXT for details.

7 //	7 //

8 //===----------------------------------------------------------------------===//	8 //===----------------------------------------------------------------------===//

9 //	9 //

10 // This file implements the MipsMCCodeEmitter class.	10 // This file implements the MipsMCCodeEmitter class.

(...skipping 285 matching lines...) Expand 10 before \| Expand all \| Expand 10 after Loading...
296 break;	296 break;

297 case MCSymbolRefExpr::VK_Mips_GOT_LO16:	297 case MCSymbolRefExpr::VK_Mips_GOT_LO16:

298 FixupKind = Mips::fixup_Mips_GOT_LO16;	298 FixupKind = Mips::fixup_Mips_GOT_LO16;

299 break;	299 break;

300 case MCSymbolRefExpr::VK_Mips_CALL_HI16:	300 case MCSymbolRefExpr::VK_Mips_CALL_HI16:

301 FixupKind = Mips::fixup_Mips_CALL_HI16;	301 FixupKind = Mips::fixup_Mips_CALL_HI16;

302 break;	302 break;

303 case MCSymbolRefExpr::VK_Mips_CALL_LO16:	303 case MCSymbolRefExpr::VK_Mips_CALL_LO16:

304 FixupKind = Mips::fixup_Mips_CALL_LO16;	304 FixupKind = Mips::fixup_Mips_CALL_LO16;

305 break;	305 break;

	306 // @LOCALMOD-START

	307 case MCSymbolRefExpr::VK_Mips_NACL_LONG_BRANCH_HI16:

	308 FixupKind = Mips::fixup_Mips_NACL_LONG_BRANCH_HI16;

	309 break;

	310 case MCSymbolRefExpr::VK_Mips_NACL_LONG_BRANCH_LO16:

	311 FixupKind = Mips::fixup_Mips_NACL_LONG_BRANCH_LO16;

	312 break;

	313 // @LOCALMOD-END

306 } // switch	314 } // switch

307	315

308 Fixups.push_back(MCFixup::Create(0, Expr, MCFixupKind(FixupKind)));	316 Fixups.push_back(MCFixup::Create(0, Expr, MCFixupKind(FixupKind)));

309 return 0;	317 return 0;

310 }	318 }

311 return 0;	319 return 0;

312 }	320 }

313	321

314 /// getMachineOpValue - Return binary encoding of operand. If the machine	322 /// getMachineOpValue - Return binary encoding of operand. If the machine

315 /// operand requires relocation, record the relocation and return zero.	323 /// operand requires relocation, record the relocation and return zero.

(...skipping 44 matching lines...) Expand 10 before \| Expand all \| Expand 10 after Loading...
360 assert(MI.getOperand(OpNo-1).isImm());	368 assert(MI.getOperand(OpNo-1).isImm());

361 assert(MI.getOperand(OpNo).isImm());	369 assert(MI.getOperand(OpNo).isImm());

362 unsigned Position = getMachineOpValue(MI, MI.getOperand(OpNo-1), Fixups);	370 unsigned Position = getMachineOpValue(MI, MI.getOperand(OpNo-1), Fixups);

363 unsigned Size = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);	371 unsigned Size = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);

364	372

365 return Position + Size - 1;	373 return Position + Size - 1;

366 }	374 }

367	375

368 #include "MipsGenMCCodeEmitter.inc"	376 #include "MipsGenMCCodeEmitter.inc"

369	377

OLD	NEW