[MIPS] Modify LongBranch expansion to work with sandboxing

lib/Target/Mips/MipsInstrInfo.td

 //===- MipsInstrInfo.td - Target Description for Mips Target -*- tablegen -*-=//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains the Mips implementation of the TargetInstrInfo class.
@@ skipping 823 matching lines @@
 MipsAsmPseudoInst<(outs CPURegs:$dst), (ins CPURegs:$src1, CPURegs:$src2),
     "sfi_return_preamble\t$dst, $src1, $src2">;
 
 def SFI_NOP_IF_AT_BUNDLE_END :
 MipsAsmPseudoInst<(outs), (ins), "sfi_nop_if_at_bundle_end">;
 
 def SFI_DATA_MASK :
 MipsAsmPseudoInst<(outs CPURegs:$dst), (ins CPURegs:$src1, CPURegs:$src2),
     "sfi_data_mask\t$dst, $src1, $src2">;
 
+// See the comment in MipsLongBranch.cpp why we need these two instructions.
+def NACL_LONG_BRANCH_LUi :
+MipsAsmPseudoInst<(outs CPURegs:$dst), (ins brtarget:$tgt, brtarget:$baltgt),
+    "nacl_long_branch_lui\t$dst, $tgt, $baltgt">;
+
+def NACL_LONG_BRANCH_ADDiu :
+MipsAsmPseudoInst<(outs CPURegs:$dst),
+                  (ins CPURegs:$src, brtarget:$tgt, brtarget:$baltgt),
+    "nacl_long_branch_addiu\t$dst, $src, $tgt, $baltgt">;
+
 // @LOCALMOD-END
 
 // Return RA.
 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1 in
 def RetRA : PseudoSE<(outs), (ins), [(MipsRet)]>;
 
 let Defs = [SP], Uses = [SP], hasSideEffects = 1 in {
 def ADJCALLSTACKDOWN : MipsPseudo<(outs), (ins i32imm:$amt),
                                   [(callseq_start timm:$amt)]>;
 def ADJCALLSTACKUP   : MipsPseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
@@ skipping 533 matching lines @@
 include "Mips16InstrFormats.td"
 include "Mips16InstrInfo.td"
 
 // DSP
 include "MipsDSPInstrFormats.td"
 include "MipsDSPInstrInfo.td"
 
 // Micromips
 include "MicroMipsInstrFormats.td"
 include "MicroMipsInstrInfo.td"