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Side by Side Diff: src/compiler/x64/instruction-selector-x64.cc

Issue 2767983002: [wasm] Implement wasm x64 I16x8 Ops (Closed)
Patch Set: Bill's review Created 3 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <algorithm> 5 #include <algorithm>
6 6
7 #include "src/base/adapters.h" 7 #include "src/base/adapters.h"
8 #include "src/compiler/instruction-selector-impl.h" 8 #include "src/compiler/instruction-selector-impl.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/node-properties.h" 10 #include "src/compiler/node-properties.h"
(...skipping 2420 matching lines...) Expand 10 before | Expand all | Expand 10 after
2431 kAtomic##op##Int16, kAtomic##op##Uint16, \ 2431 kAtomic##op##Int16, kAtomic##op##Uint16, \
2432 kAtomic##op##Word32); \ 2432 kAtomic##op##Word32); \
2433 } 2433 }
2434 VISIT_ATOMIC_BINOP(Add) 2434 VISIT_ATOMIC_BINOP(Add)
2435 VISIT_ATOMIC_BINOP(Sub) 2435 VISIT_ATOMIC_BINOP(Sub)
2436 VISIT_ATOMIC_BINOP(And) 2436 VISIT_ATOMIC_BINOP(And)
2437 VISIT_ATOMIC_BINOP(Or) 2437 VISIT_ATOMIC_BINOP(Or)
2438 VISIT_ATOMIC_BINOP(Xor) 2438 VISIT_ATOMIC_BINOP(Xor)
2439 #undef VISIT_ATOMIC_BINOP 2439 #undef VISIT_ATOMIC_BINOP
2440 2440
2441 #define SIMD_TYPES(V) V(I32x4) 2441 #define SIMD_TYPES(V) \
2442 V(I32x4) \
2443 V(I16x8)
2444
2445 #define SIMD_FORMAT_LIST(V) \
2446 V(32x4) \
2447 V(16x8)
2442 2448
2443 #define SIMD_ZERO_OP_LIST(V) \ 2449 #define SIMD_ZERO_OP_LIST(V) \
2444 V(S128Zero) \ 2450 V(S128Zero) \
2445 V(S1x4Zero) \ 2451 V(S1x4Zero) \
2446 V(S1x8Zero) \ 2452 V(S1x8Zero) \
2447 V(S1x16Zero) 2453 V(S1x16Zero)
2448 2454
2449 #define SIMD_SHIFT_OPCODES(V) \
2450 V(I32x4Shl) \
2451 V(I32x4ShrS) \
2452 V(I32x4ShrU)
2453
2454 #define SIMD_BINOP_LIST(V) \ 2455 #define SIMD_BINOP_LIST(V) \
2455 V(I32x4Add) \ 2456 V(I32x4Add) \
2456 V(I32x4Sub) \ 2457 V(I32x4Sub) \
2457 V(I32x4Mul) \ 2458 V(I32x4Mul) \
2458 V(I32x4MinS) \ 2459 V(I32x4MinS) \
2459 V(I32x4MaxS) \ 2460 V(I32x4MaxS) \
2460 V(I32x4Eq) \ 2461 V(I32x4Eq) \
2461 V(I32x4Ne) \ 2462 V(I32x4Ne) \
2462 V(I32x4MinU) \ 2463 V(I32x4MinU) \
2463 V(I32x4MaxU) 2464 V(I32x4MaxU) \
2465 V(I16x8Add) \
2466 V(I16x8AddSaturateS) \
2467 V(I16x8Sub) \
2468 V(I16x8SubSaturateS) \
2469 V(I16x8Mul) \
2470 V(I16x8MinS) \
2471 V(I16x8MaxS) \
2472 V(I16x8Eq) \
2473 V(I16x8Ne) \
2474 V(I16x8AddSaturateU) \
2475 V(I16x8SubSaturateU) \
2476 V(I16x8MinU) \
2477 V(I16x8MaxU)
2478
2479 #define SIMD_SHIFT_OPCODES(V) \
2480 V(I32x4Shl) \
2481 V(I32x4ShrS) \
2482 V(I32x4ShrU) \
2483 V(I16x8Shl) \
2484 V(I16x8ShrS) \
2485 V(I16x8ShrU)
2464 2486
2465 #define VISIT_SIMD_SPLAT(Type) \ 2487 #define VISIT_SIMD_SPLAT(Type) \
2466 void InstructionSelector::Visit##Type##Splat(Node* node) { \ 2488 void InstructionSelector::Visit##Type##Splat(Node* node) { \
2467 X64OperandGenerator g(this); \ 2489 X64OperandGenerator g(this); \
2468 Emit(kX64##Type##Splat, g.DefineAsRegister(node), \ 2490 Emit(kX64##Type##Splat, g.DefineAsRegister(node), \
2469 g.Use(node->InputAt(0))); \ 2491 g.Use(node->InputAt(0))); \
2470 } 2492 }
2471 SIMD_TYPES(VISIT_SIMD_SPLAT) 2493 SIMD_TYPES(VISIT_SIMD_SPLAT)
2472 #undef VISIT_SIMD_SPLAT 2494 #undef VISIT_SIMD_SPLAT
2473 2495
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after
2512 2534
2513 #define VISIT_SIMD_BINOP(Opcode) \ 2535 #define VISIT_SIMD_BINOP(Opcode) \
2514 void InstructionSelector::Visit##Opcode(Node* node) { \ 2536 void InstructionSelector::Visit##Opcode(Node* node) { \
2515 X64OperandGenerator g(this); \ 2537 X64OperandGenerator g(this); \
2516 Emit(kX64##Opcode, g.DefineSameAsFirst(node), \ 2538 Emit(kX64##Opcode, g.DefineSameAsFirst(node), \
2517 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); \ 2539 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); \
2518 } 2540 }
2519 SIMD_BINOP_LIST(VISIT_SIMD_BINOP) 2541 SIMD_BINOP_LIST(VISIT_SIMD_BINOP)
2520 #undef VISIT_SIMD_BINOP 2542 #undef VISIT_SIMD_BINOP
2521 2543
2522 void InstructionSelector::VisitS32x4Select(Node* node) { 2544 #define SIMD_VISIT_SELECT_OP(format) \
2523 X64OperandGenerator g(this); 2545 void InstructionSelector::VisitS##format##Select(Node* node) { \
2524 Emit(kX64S32x4Select, g.DefineSameAsFirst(node), 2546 X64OperandGenerator g(this); \
2525 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), 2547 Emit(kX64S128Select, g.DefineSameAsFirst(node), \
2526 g.UseRegister(node->InputAt(2))); 2548 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), \
2527 } 2549 g.UseRegister(node->InputAt(2))); \
2550 }
2551 SIMD_FORMAT_LIST(SIMD_VISIT_SELECT_OP)
2552 #undef SIMD_VISIT_SELECT_OP
2528 2553
2529 void InstructionSelector::VisitInt32AbsWithOverflow(Node* node) { 2554 void InstructionSelector::VisitInt32AbsWithOverflow(Node* node) {
2530 UNREACHABLE(); 2555 UNREACHABLE();
2531 } 2556 }
2532 2557
2533 void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) { 2558 void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
2534 UNREACHABLE(); 2559 UNREACHABLE();
2535 } 2560 }
2536 2561
2537 // static 2562 // static
(...skipping 22 matching lines...) Expand all
2560 // static 2585 // static
2561 MachineOperatorBuilder::AlignmentRequirements 2586 MachineOperatorBuilder::AlignmentRequirements
2562 InstructionSelector::AlignmentRequirements() { 2587 InstructionSelector::AlignmentRequirements() {
2563 return MachineOperatorBuilder::AlignmentRequirements:: 2588 return MachineOperatorBuilder::AlignmentRequirements::
2564 FullUnalignedAccessSupport(); 2589 FullUnalignedAccessSupport();
2565 } 2590 }
2566 2591
2567 } // namespace compiler 2592 } // namespace compiler
2568 } // namespace internal 2593 } // namespace internal
2569 } // namespace v8 2594 } // namespace v8
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