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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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151 V(X64I32x4Add) \ | 151 V(X64I32x4Add) \ |
152 V(X64I32x4Sub) \ | 152 V(X64I32x4Sub) \ |
153 V(X64I32x4Mul) \ | 153 V(X64I32x4Mul) \ |
154 V(X64I32x4MinS) \ | 154 V(X64I32x4MinS) \ |
155 V(X64I32x4MaxS) \ | 155 V(X64I32x4MaxS) \ |
156 V(X64I32x4Eq) \ | 156 V(X64I32x4Eq) \ |
157 V(X64I32x4Ne) \ | 157 V(X64I32x4Ne) \ |
158 V(X64I32x4ShrU) \ | 158 V(X64I32x4ShrU) \ |
159 V(X64I32x4MinU) \ | 159 V(X64I32x4MinU) \ |
160 V(X64I32x4MaxU) \ | 160 V(X64I32x4MaxU) \ |
161 V(X64S32x4Select) \ | 161 V(X64I16x8Splat) \ |
| 162 V(X64I16x8ExtractLane) \ |
| 163 V(X64I16x8ReplaceLane) \ |
| 164 V(X64I16x8Shl) \ |
| 165 V(X64I16x8ShrS) \ |
| 166 V(X64I16x8Add) \ |
| 167 V(X64I16x8AddSaturateS) \ |
| 168 V(X64I16x8Sub) \ |
| 169 V(X64I16x8SubSaturateS) \ |
| 170 V(X64I16x8Mul) \ |
| 171 V(X64I16x8MinS) \ |
| 172 V(X64I16x8MaxS) \ |
| 173 V(X64I16x8Eq) \ |
| 174 V(X64I16x8Ne) \ |
| 175 V(X64I16x8ShrU) \ |
| 176 V(X64I16x8AddSaturateU) \ |
| 177 V(X64I16x8SubSaturateU) \ |
| 178 V(X64I16x8MinU) \ |
| 179 V(X64I16x8MaxU) \ |
| 180 V(X64S128Select) \ |
162 V(X64S128Zero) | 181 V(X64S128Zero) |
163 | 182 |
164 // Addressing modes represent the "shape" of inputs to an instruction. | 183 // Addressing modes represent the "shape" of inputs to an instruction. |
165 // Many instructions support multiple addressing modes. Addressing modes | 184 // Many instructions support multiple addressing modes. Addressing modes |
166 // are encoded into the InstructionCode of the instruction and tell the | 185 // are encoded into the InstructionCode of the instruction and tell the |
167 // code generator after register allocation which assembler method to call. | 186 // code generator after register allocation which assembler method to call. |
168 // | 187 // |
169 // We use the following local notation for addressing modes: | 188 // We use the following local notation for addressing modes: |
170 // | 189 // |
171 // M = memory operand | 190 // M = memory operand |
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194 V(M8I) /* [ %r2*8 + K] */ \ | 213 V(M8I) /* [ %r2*8 + K] */ \ |
195 V(Root) /* [%root + K] */ | 214 V(Root) /* [%root + K] */ |
196 | 215 |
197 enum X64MemoryProtection { kUnprotected = 0, kProtected = 1 }; | 216 enum X64MemoryProtection { kUnprotected = 0, kProtected = 1 }; |
198 | 217 |
199 } // namespace compiler | 218 } // namespace compiler |
200 } // namespace internal | 219 } // namespace internal |
201 } // namespace v8 | 220 } // namespace v8 |
202 | 221 |
203 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 222 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
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