[deoptimizer] Fill the single precision registers in the deoptimizer entry stub.

src/arm/deoptimizer-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/assembler-inl.h"
 #include "src/codegen.h"
 #include "src/deoptimizer.h"
 #include "src/full-codegen/full-codegen.h"
 #include "src/objects-inl.h"
 #include "src/register-configuration.h"
@@ skipping 103 matching lines @@
 void Deoptimizer::TableEntryGenerator::Generate() {
   GeneratePrologue();
 
   // Save all general purpose registers before messing with them.
   const int kNumberOfRegisters = Register::kNumRegisters;
 
   // Everything but pc, lr and ip which will be saved but not restored.
   RegList restored_regs = kJSCallerSaved | kCalleeSaved | ip.bit();
 
   const int kDoubleRegsSize = kDoubleSize * DwVfpRegister::kMaxNumRegisters;
+  const int kFloatRegsSize = kFloatSize * SwVfpRegister::kMaxNumRegisters;
 
   // Save all allocatable VFP registers before messing with them.
   DCHECK(kDoubleRegZero.code() == 14);
   DCHECK(kScratchDoubleReg.code() == 15);
 
   {
     // We use a run-time check for VFP32DREGS.
     CpuFeatureScope scope(masm(), VFP32DREGS,
                           CpuFeatureScope::kDontCheckSupported);
 
     // Check CPU flags for number of registers, setting the Z condition flag.
     __ CheckFor32DRegs(ip);
 
     // Push registers d0-d15, and possibly d16-d31, on the stack.
     // If d16-d31 are not pushed, decrease the stack pointer instead.
     __ vstm(db_w, sp, d16, d31, ne);
     __ sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
     __ vstm(db_w, sp, d0, d15);
+
+    // Push registers s0-s15, and possibly s16-s31, on the stack.

[bbudge, 2017/03/22 17:08:02]

I think all ARM targets have 32 single precision registers.

+    // If s16-s31 are not pushed, decrease the stack pointer instead.
+    __ vstm(db_w, sp, s16, s31, ne);
+    __ sub(sp, sp, Operand(16 * kFloatSize), LeaveCC, eq);
+    __ vstm(db_w, sp, s0, s15);
   }
 
   // Push all 16 registers (needed to populate FrameDescription::registers_).
   // TODO(1588) Note that using pc with stm is deprecated, so we should perhaps
   // handle this a bit differently.
   __ stm(db_w, sp, restored_regs  | sp.bit() | lr.bit() | pc.bit());
 
   __ mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
   __ str(fp, MemOperand(ip));
 
   const int kSavedRegistersAreaSize =
-      (kNumberOfRegisters * kPointerSize) + kDoubleRegsSize;
+      (kNumberOfRegisters * kPointerSize) + kDoubleRegsSize + kFloatRegsSize;
 
   // Get the bailout id from the stack.
   __ ldr(r2, MemOperand(sp, kSavedRegistersAreaSize));
 
   // Get the address of the location in the code object (r3) (return
   // address for lazy deoptimization) and compute the fp-to-sp delta in
   // register r4.
   __ mov(r3, lr);
   // Correct one word for bailout id.
   __ add(r4, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));
@@ skipping 32 matching lines @@
     __ str(r2, MemOperand(r1, offset));
   }
 
   // Copy VFP registers to
   // double_registers_[DoubleRegister::kMaxNumAllocatableRegisters]
   int double_regs_offset = FrameDescription::double_registers_offset();
   const RegisterConfiguration* config = RegisterConfiguration::Crankshaft();
   for (int i = 0; i < config->num_allocatable_double_registers(); ++i) {
     int code = config->GetAllocatableDoubleCode(i);
     int dst_offset = code * kDoubleSize + double_regs_offset;
-    int src_offset = code * kDoubleSize + kNumberOfRegisters * kPointerSize;
+    int src_offset =
+        code * kDoubleSize + kNumberOfRegisters * kPointerSize + kFloatRegsSize;
     __ vldr(d0, sp, src_offset);
     __ vstr(d0, r1, dst_offset);
   }
 
+  // Copy VFP registers to
+  // float_registers_[FloatRegister::kMaxNumAllocatableRegisters]
+  int float_regs_offset = FrameDescription::float_registers_offset();
+  for (int i = 0; i < config->num_allocatable_float_registers(); ++i) {
+    int code = config->GetAllocatableFloatCode(i);
+    int dst_offset = code * kFloatSize + float_regs_offset;
+    int src_offset = code * kFloatSize + kNumberOfRegisters * kPointerSize;
+    __ ldr(r2, MemOperand(sp, src_offset));
+    __ str(r2, MemOperand(r1, dst_offset));
+  }
+
   // Remove the bailout id and the saved registers from the stack.
   __ add(sp, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));
 
   // Compute a pointer to the unwinding limit in register r2; that is
   // the first stack slot not part of the input frame.
   __ ldr(r2, MemOperand(r1, FrameDescription::frame_size_offset()));
   __ add(r2, r2, sp);
 
   // Unwind the stack down to - but not including - the unwinding
   // limit and copy the contents of the activation frame to the input
@@ skipping 153 matching lines @@
 void FrameDescription::SetCallerConstantPool(unsigned offset, intptr_t value) {
   DCHECK(FLAG_enable_embedded_constant_pool);
   SetFrameSlot(offset, value);
 }
 
 
 #undef __
 
 }  // namespace internal
 }  // namespace v8