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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 1942 // Convert to Fixed Logical (64<-F32) | 1942 // Convert to Fixed Logical (64<-F32) |
| 1943 void Assembler::clgebr(Condition m3, Condition m4, Register r1, | 1943 void Assembler::clgebr(Condition m3, Condition m4, Register r1, |
| 1944 DoubleRegister r2) { | 1944 DoubleRegister r2) { |
| 1945 DCHECK_EQ(m4, Condition(0)); | 1945 DCHECK_EQ(m4, Condition(0)); |
| 1946 rrfe_form(CLGEBR, m3, m4, r1, Register::from_code(r2.code())); | 1946 rrfe_form(CLGEBR, m3, m4, r1, Register::from_code(r2.code())); |
| 1947 } | 1947 } |
| 1948 | 1948 |
| 1949 // Convert to Fixed Logical (32<-F64) | 1949 // Convert to Fixed Logical (32<-F64) |
| 1950 void Assembler::clfdbr(Condition m3, Condition m4, Register r1, | 1950 void Assembler::clfdbr(Condition m3, Condition m4, Register r1, |
| 1951 DoubleRegister r2) { | 1951 DoubleRegister r2) { |
| 1952 DCHECK_EQ(m3, Condition(0)); | |
| 1953 DCHECK_EQ(m4, Condition(0)); | 1952 DCHECK_EQ(m4, Condition(0)); |
| 1954 rrfe_form(CLFDBR, Condition(0), Condition(0), r1, | 1953 rrfe_form(CLFDBR, m3, Condition(0), r1, Register::from_code(r2.code())); |
| 1955 Register::from_code(r2.code())); | |
| 1956 } | 1954 } |
| 1957 | 1955 |
| 1958 // Convert to Fixed Logical (32<-F32) | 1956 // Convert to Fixed Logical (32<-F32) |
| 1959 void Assembler::clfebr(Condition m3, Condition m4, Register r1, | 1957 void Assembler::clfebr(Condition m3, Condition m4, Register r1, |
| 1960 DoubleRegister r2) { | 1958 DoubleRegister r2) { |
| 1961 DCHECK_EQ(m4, Condition(0)); | 1959 DCHECK_EQ(m4, Condition(0)); |
| 1962 rrfe_form(CLFEBR, m3, Condition(0), r1, Register::from_code(r2.code())); | 1960 rrfe_form(CLFEBR, m3, Condition(0), r1, Register::from_code(r2.code())); |
| 1963 } | 1961 } |
| 1964 | 1962 |
| 1965 // Convert from Fixed Logical (L<-64) | 1963 // Convert from Fixed Logical (L<-64) |
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| 2161 SKIP_ICACHE_FLUSH); | 2159 SKIP_ICACHE_FLUSH); |
| 2162 } | 2160 } |
| 2163 | 2161 |
| 2164 reloc_info_writer.Write(&rinfo); | 2162 reloc_info_writer.Write(&rinfo); |
| 2165 } | 2163 } |
| 2166 } | 2164 } |
| 2167 | 2165 |
| 2168 } // namespace internal | 2166 } // namespace internal |
| 2169 } // namespace v8 | 2167 } // namespace v8 |
| 2170 #endif // V8_TARGET_ARCH_S390 | 2168 #endif // V8_TARGET_ARCH_S390 |
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