[arm64] Use acquire/release memory accesses for atomics

src/compiler/arm64/code-generator-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/arm64/assembler-arm64-inl.h"
 #include "src/arm64/frames-arm64.h"
 #include "src/arm64/macro-assembler-arm64-inl.h"
 #include "src/compilation-info.h"
@@ skipping 500 matching lines @@
       __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0),    \
                    i.InputRegister##width(1));                              \
     } else {                                                                \
       uint32_t imm =                                                        \
           static_cast<uint32_t>(i.InputOperand##width(1).ImmediateValue()); \
       __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0),    \
                    imm % (width));                                          \
     }                                                                       \
   } while (0)
 
-#define ASSEMBLE_ATOMIC_LOAD_INTEGER(asm_instr)                       \
-  do {                                                                \
-    __ asm_instr(i.OutputRegister(),                                  \
-                 MemOperand(i.InputRegister(0), i.InputRegister(1))); \
-    __ Dmb(InnerShareable, BarrierAll);                               \
+#define ASSEMBLE_ATOMIC_LOAD_INTEGER(asm_instr)                        \
+  do {                                                                 \
+    __ Add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
+    __ asm_instr(i.OutputRegister32(), i.TempRegister(0));             \
   } while (0)
 
-#define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr)                      \
-  do {                                                                \
-    __ Dmb(InnerShareable, BarrierAll);                               \
-    __ asm_instr(i.InputRegister(2),                                  \
-                 MemOperand(i.InputRegister(0), i.InputRegister(1))); \
-    __ Dmb(InnerShareable, BarrierAll);                               \
+#define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr)                       \
+  do {                                                                 \
+    __ Add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
+    __ asm_instr(i.InputRegister32(2), i.TempRegister(0));             \
   } while (0)
 
 #define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(load_instr, store_instr)      \
   do {                                                                 \
     Label exchange;                                                    \
     __ bind(&exchange);                                                \
     __ Add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
     __ load_instr(i.OutputRegister32(), i.TempRegister(0));            \
     __ store_instr(i.TempRegister32(0), i.InputRegister32(2),          \
                    i.TempRegister(0));                                 \
@@ skipping 1084 matching lines @@
     case kCheckedStoreWord64:
       ASSEMBLE_CHECKED_STORE_INTEGER_64(Str);
       break;
     case kCheckedStoreFloat32:
       ASSEMBLE_CHECKED_STORE_FLOAT(32);
       break;
     case kCheckedStoreFloat64:
       ASSEMBLE_CHECKED_STORE_FLOAT(64);
       break;
     case kAtomicLoadInt8:
-      ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldrsb);
+      ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldarb);
+      __ Sxtb(i.OutputRegister(0), i.OutputRegister(0));
       break;
     case kAtomicLoadUint8:
-      ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldrb);
+      ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldarb);
       break;
     case kAtomicLoadInt16:
-      ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldrsh);
+      ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldarh);
+      __ Sxth(i.OutputRegister(0), i.OutputRegister(0));
       break;
     case kAtomicLoadUint16:
-      ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldrh);
+      ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldarh);
       break;
     case kAtomicLoadWord32:
-      __ Ldr(i.OutputRegister32(),
-             MemOperand(i.InputRegister(0), i.InputRegister(1)));
-      __ Dmb(InnerShareable, BarrierAll);
+      ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldar);
       break;
     case kAtomicStoreWord8:
-      ASSEMBLE_ATOMIC_STORE_INTEGER(Strb);
+      ASSEMBLE_ATOMIC_STORE_INTEGER(Stlrb);

[aseemgarg, 2017/03/20 20:56:46]

Is this correct? Since, stlr/b/h is store with release, will it work without
being preceded by a ldar/b/h?
Other than that looks good but someone else will have to l-g-t-m.

       break;
     case kAtomicStoreWord16:
-      ASSEMBLE_ATOMIC_STORE_INTEGER(Strh);
+      ASSEMBLE_ATOMIC_STORE_INTEGER(Stlrh);
       break;
     case kAtomicStoreWord32:
-      __ Dmb(InnerShareable, BarrierAll);
-      __ Str(i.InputRegister32(2),
-             MemOperand(i.InputRegister(0), i.InputRegister(1)));
-      __ Dmb(InnerShareable, BarrierAll);
+      ASSEMBLE_ATOMIC_STORE_INTEGER(Stlr);
       break;
     case kAtomicExchangeInt8:
       ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrb, stlxrb);
       __ Sxtb(i.OutputRegister(0), i.OutputRegister(0));
       break;
     case kAtomicExchangeUint8:
       ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrb, stlxrb);
       break;
     case kAtomicExchangeInt16:
       ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrh, stlxrh);
@@ skipping 575 matching lines @@
       padding_size -= kInstructionSize;
     }
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8