[arm64] Use exclusive instructions in exchange

src/compiler/arm64/code-generator-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/arm64/assembler-arm64-inl.h"
 #include "src/arm64/frames-arm64.h"
 #include "src/arm64/macro-assembler-arm64-inl.h"
 #include "src/compilation-info.h"
@@ skipping 516 matching lines @@
   do {                                                                \
     __ Dmb(InnerShareable, BarrierAll);                               \
     __ asm_instr(i.InputRegister(2),                                  \
                  MemOperand(i.InputRegister(0), i.InputRegister(1))); \
     __ Dmb(InnerShareable, BarrierAll);                               \
   } while (0)
 
 #define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(load_instr, store_instr)      \
   do {                                                                 \
     Label exchange;                                                    \
-    __ bind(&exchange);                                                \
+    __ Dmb(InnerShareable, BarrierAll);                                \
+    __ Bind(&exchange);                                                \
     __ Add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
     __ load_instr(i.OutputRegister32(), i.TempRegister(0));            \
     __ store_instr(i.TempRegister32(), i.InputRegister32(2),           \
                    i.TempRegister(0));                                 \
-    __ cbnz(i.TempRegister32(), &exchange);                            \
+    __ Cbnz(i.TempRegister32(), &exchange);                            \
+    __ Dmb(InnerShareable, BarrierAll);                                \
   } while (0)
 
 #define ASSEMBLE_IEEE754_BINOP(name)                                          \
   do {                                                                        \
     FrameScope scope(masm(), StackFrame::MANUAL);                             \
     __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \
                      0, 2);                                                   \
   } while (0)
 
 #define ASSEMBLE_IEEE754_UNOP(name)                                           \
@@ skipping 1087 matching lines @@
     case kAtomicStoreWord16:
       ASSEMBLE_ATOMIC_STORE_INTEGER(Strh);
       break;
     case kAtomicStoreWord32:
       __ Dmb(InnerShareable, BarrierAll);
       __ Str(i.InputRegister32(2),
              MemOperand(i.InputRegister(0), i.InputRegister(1)));
       __ Dmb(InnerShareable, BarrierAll);
       break;
     case kAtomicExchangeInt8:
-      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrb, stlxrb);
+      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldxrb, stxrb);
       __ Sxtb(i.OutputRegister(0), i.OutputRegister(0));
       break;
     case kAtomicExchangeUint8:
-      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrb, stlxrb);
+      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldxrb, stxrb);
       break;
     case kAtomicExchangeInt16:
-      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrh, stlxrh);
+      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldxrh, stxrh);
       __ Sxth(i.OutputRegister(0), i.OutputRegister(0));
       break;
     case kAtomicExchangeUint16:
-      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrh, stlxrh);
+      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldxrh, stxrh);
       break;
     case kAtomicExchangeWord32:
-      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxr, stlxr);
+      ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldxr, stxr);
       break;
   }
   return kSuccess;
 }  // NOLINT(readability/fn_size)
 
 
 // Assemble branches after this instruction.
 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
   Arm64OperandConverter i(this, instr);
   Label* tlabel = branch->true_label;
@@ skipping 534 matching lines @@
       padding_size -= kInstructionSize;
     }
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8