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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM64_DECODER_ARM64_H_ | 5 #ifndef V8_ARM64_DECODER_ARM64_H_ |
6 #define V8_ARM64_DECODER_ARM64_H_ | 6 #define V8_ARM64_DECODER_ARM64_H_ |
7 | 7 |
8 #include <list> | 8 #include <list> |
9 | 9 |
10 #include "src/arm64/instructions-arm64.h" | 10 #include "src/arm64/instructions-arm64.h" |
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32 V(Exception) \ | 32 V(Exception) \ |
33 V(LoadStorePairPostIndex) \ | 33 V(LoadStorePairPostIndex) \ |
34 V(LoadStorePairOffset) \ | 34 V(LoadStorePairOffset) \ |
35 V(LoadStorePairPreIndex) \ | 35 V(LoadStorePairPreIndex) \ |
36 V(LoadLiteral) \ | 36 V(LoadLiteral) \ |
37 V(LoadStoreUnscaledOffset) \ | 37 V(LoadStoreUnscaledOffset) \ |
38 V(LoadStorePostIndex) \ | 38 V(LoadStorePostIndex) \ |
39 V(LoadStorePreIndex) \ | 39 V(LoadStorePreIndex) \ |
40 V(LoadStoreRegisterOffset) \ | 40 V(LoadStoreRegisterOffset) \ |
41 V(LoadStoreUnsignedOffset) \ | 41 V(LoadStoreUnsignedOffset) \ |
| 42 V(LoadStoreExclusive) \ |
42 V(LoadStoreAcquireRelease) \ | 43 V(LoadStoreAcquireRelease) \ |
43 V(LogicalShifted) \ | 44 V(LogicalShifted) \ |
44 V(AddSubShifted) \ | 45 V(AddSubShifted) \ |
45 V(AddSubExtended) \ | 46 V(AddSubExtended) \ |
46 V(AddSubWithCarry) \ | 47 V(AddSubWithCarry) \ |
47 V(ConditionalCompareRegister) \ | 48 V(ConditionalCompareRegister) \ |
48 V(ConditionalCompareImmediate) \ | 49 V(ConditionalCompareImmediate) \ |
49 V(ConditionalSelect) \ | 50 V(ConditionalSelect) \ |
50 V(DataProcessing1Source) \ | 51 V(DataProcessing1Source) \ |
51 V(DataProcessing2Source) \ | 52 V(DataProcessing2Source) \ |
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179 // tree, and call the corresponding visitors. | 180 // tree, and call the corresponding visitors. |
180 // On entry, instruction bits 27:25 = 0x7. | 181 // On entry, instruction bits 27:25 = 0x7. |
181 void DecodeAdvSIMDDataProcessing(Instruction* instr); | 182 void DecodeAdvSIMDDataProcessing(Instruction* instr); |
182 }; | 183 }; |
183 | 184 |
184 | 185 |
185 } // namespace internal | 186 } // namespace internal |
186 } // namespace v8 | 187 } // namespace v8 |
187 | 188 |
188 #endif // V8_ARM64_DECODER_ARM64_H_ | 189 #endif // V8_ARM64_DECODER_ARM64_H_ |
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