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Side by Side Diff: src/arm64/decoder-arm64-inl.h

Issue 2754543006: [arm64] Use exclusive instructions in exchange (Closed)
Patch Set: Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_ARM64_DECODER_ARM64_INL_H_ 5 #ifndef V8_ARM64_DECODER_ARM64_INL_H_
6 #define V8_ARM64_DECODER_ARM64_INL_H_ 6 #define V8_ARM64_DECODER_ARM64_INL_H_
7 7
8 #include "src/arm64/decoder-arm64.h" 8 #include "src/arm64/decoder-arm64.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/utils.h" 10 #include "src/utils.h"
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206 } 206 }
207 207
208 208
209 template<typename V> 209 template<typename V>
210 void Decoder<V>::DecodeLoadStore(Instruction* instr) { 210 void Decoder<V>::DecodeLoadStore(Instruction* instr) {
211 DCHECK((instr->Bits(27, 24) == 0x8) || 211 DCHECK((instr->Bits(27, 24) == 0x8) ||
212 (instr->Bits(27, 24) == 0x9) || 212 (instr->Bits(27, 24) == 0x9) ||
213 (instr->Bits(27, 24) == 0xC) || 213 (instr->Bits(27, 24) == 0xC) ||
214 (instr->Bits(27, 24) == 0xD) ); 214 (instr->Bits(27, 24) == 0xD) );
215 215
216 if ((instr->Bit(28) == 0) && (instr->Bit(29) == 0) && (instr->Bit(26) == 1)) {
binji 2017/03/15 22:17:35 Not necessary to check for instr->Bit(24) here?
217 DecodeAdvSIMDLoadStore(instr);
218 return;
219 }
220
216 if (instr->Bit(24) == 0) { 221 if (instr->Bit(24) == 0) {
217 if (instr->Bit(28) == 0) { 222 if (instr->Bit(28) == 0) {
218 if (instr->Bit(29) == 0) { 223 if (instr->Bit(29) == 0) {
219 if (instr->Bit(26) == 0) { 224 if (instr->Bit(26) == 0) {
220 if (instr->Mask(0xA08000) == 0x800000 || 225 if (instr->Mask(0xA08000) == 0x800000 ||
221 instr->Mask(0xA00000) == 0xA00000) { 226 instr->Mask(0xA00000) == 0xA00000) {
222 V::VisitUnallocated(instr); 227 V::VisitUnallocated(instr);
223 } else if (instr->Mask(0x808000) == 0) { 228 } else if (instr->Mask(0x808000) == 0) {
224 // Load/Store exclusive without acquire/release are unimplemented. 229 V::VisitLoadStoreExclusive(instr);
225 V::VisitUnimplemented(instr);
226 } else { 230 } else {
227 V::VisitLoadStoreAcquireRelease(instr); 231 V::VisitLoadStoreAcquireRelease(instr);
228 } 232 }
229 } else {
230 DecodeAdvSIMDLoadStore(instr);
231 } 233 }
232 } else { 234 } else {
233 if ((instr->Bits(31, 30) == 0x3) || 235 if ((instr->Bits(31, 30) == 0x3) ||
234 (instr->Mask(0xC4400000) == 0x40000000)) { 236 (instr->Mask(0xC4400000) == 0x40000000)) {
235 V::VisitUnallocated(instr); 237 V::VisitUnallocated(instr);
236 } else { 238 } else {
237 if (instr->Bit(23) == 0) { 239 if (instr->Bit(23) == 0) {
238 if (instr->Mask(0xC4400000) == 0xC0400000) { 240 if (instr->Mask(0xC4400000) == 0xC0400000) {
239 V::VisitUnallocated(instr); 241 V::VisitUnallocated(instr);
240 } else { 242 } else {
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648 // TODO(all): Implement Advanced SIMD data processing instruction decode. 650 // TODO(all): Implement Advanced SIMD data processing instruction decode.
649 DCHECK(instr->Bits(27, 25) == 0x7); 651 DCHECK(instr->Bits(27, 25) == 0x7);
650 V::VisitUnimplemented(instr); 652 V::VisitUnimplemented(instr);
651 } 653 }
652 654
653 655
654 } // namespace internal 656 } // namespace internal
655 } // namespace v8 657 } // namespace v8
656 658
657 #endif // V8_ARM64_DECODER_ARM64_INL_H_ 659 #endif // V8_ARM64_DECODER_ARM64_INL_H_
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