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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_ARM64_CONSTANTS_ARM64_H_ | 5 #ifndef V8_ARM64_CONSTANTS_ARM64_H_ |
6 #define V8_ARM64_CONSTANTS_ARM64_H_ | 6 #define V8_ARM64_CONSTANTS_ARM64_H_ |
7 | 7 |
8 #include "src/base/macros.h" | 8 #include "src/base/macros.h" |
9 #include "src/globals.h" | 9 #include "src/globals.h" |
10 | 10 |
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857 LoadStoreRegisterOffsetFixed = 0x38200800, | 857 LoadStoreRegisterOffsetFixed = 0x38200800, |
858 LoadStoreRegisterOffsetFMask = 0x3B200C00, | 858 LoadStoreRegisterOffsetFMask = 0x3B200C00, |
859 LoadStoreRegisterOffsetMask = 0xFFE00C00, | 859 LoadStoreRegisterOffsetMask = 0xFFE00C00, |
860 PRFM_reg = LoadStoreRegisterOffsetFixed | PRFM, | 860 PRFM_reg = LoadStoreRegisterOffsetFixed | PRFM, |
861 #define LOAD_STORE_REGISTER_OFFSET(A, B, C, D) \ | 861 #define LOAD_STORE_REGISTER_OFFSET(A, B, C, D) \ |
862 A##B##_##C##_reg = LoadStoreRegisterOffsetFixed | D | 862 A##B##_##C##_reg = LoadStoreRegisterOffsetFixed | D |
863 LOAD_STORE_OP_LIST(LOAD_STORE_REGISTER_OFFSET) | 863 LOAD_STORE_OP_LIST(LOAD_STORE_REGISTER_OFFSET) |
864 #undef LOAD_STORE_REGISTER_OFFSET | 864 #undef LOAD_STORE_REGISTER_OFFSET |
865 }; | 865 }; |
866 | 866 |
867 // Load/store acquire/release | 867 // Load/store acquire/release. |
868 enum LoadStoreAcquireReleaseOp { | 868 enum LoadStoreAcquireReleaseOp { |
869 LoadStoreAcquireReleaseFixed = 0x08000000, | 869 LoadStoreAcquireReleaseFixed = 0x08000000, |
870 LoadStoreAcquireReleaseFMask = 0x3F000000, | 870 LoadStoreAcquireReleaseFMask = 0x3F000000, |
871 LoadStoreAcquireReleaseMask = 0xCFC08000, | 871 LoadStoreAcquireReleaseMask = 0xCFC08000, |
872 STLXR_b = LoadStoreAcquireReleaseFixed | 0x00008000, | 872 STLXR_b = LoadStoreAcquireReleaseFixed | 0x00008000, |
873 LDAXR_b = LoadStoreAcquireReleaseFixed | 0x00408000, | 873 LDAXR_b = LoadStoreAcquireReleaseFixed | 0x00408000, |
874 STLR_b = LoadStoreAcquireReleaseFixed | 0x00808000, | 874 STLR_b = LoadStoreAcquireReleaseFixed | 0x00808000, |
875 LDAR_b = LoadStoreAcquireReleaseFixed | 0x00C08000, | 875 LDAR_b = LoadStoreAcquireReleaseFixed | 0x00C08000, |
876 STLXR_h = LoadStoreAcquireReleaseFixed | 0x40008000, | 876 STLXR_h = LoadStoreAcquireReleaseFixed | 0x40008000, |
877 LDAXR_h = LoadStoreAcquireReleaseFixed | 0x40408000, | 877 LDAXR_h = LoadStoreAcquireReleaseFixed | 0x40408000, |
878 STLR_h = LoadStoreAcquireReleaseFixed | 0x40808000, | 878 STLR_h = LoadStoreAcquireReleaseFixed | 0x40808000, |
879 LDAR_h = LoadStoreAcquireReleaseFixed | 0x40C08000, | 879 LDAR_h = LoadStoreAcquireReleaseFixed | 0x40C08000, |
880 STLXR_w = LoadStoreAcquireReleaseFixed | 0x80008000, | 880 STLXR_w = LoadStoreAcquireReleaseFixed | 0x80008000, |
881 LDAXR_w = LoadStoreAcquireReleaseFixed | 0x80408000, | 881 LDAXR_w = LoadStoreAcquireReleaseFixed | 0x80408000, |
882 STLR_w = LoadStoreAcquireReleaseFixed | 0x80808000, | 882 STLR_w = LoadStoreAcquireReleaseFixed | 0x80808000, |
883 LDAR_w = LoadStoreAcquireReleaseFixed | 0x80C08000, | 883 LDAR_w = LoadStoreAcquireReleaseFixed | 0x80C08000, |
884 STLXR_x = LoadStoreAcquireReleaseFixed | 0xC0008000, | 884 STLXR_x = LoadStoreAcquireReleaseFixed | 0xC0008000, |
885 LDAXR_x = LoadStoreAcquireReleaseFixed | 0xC0408000, | 885 LDAXR_x = LoadStoreAcquireReleaseFixed | 0xC0408000, |
886 STLR_x = LoadStoreAcquireReleaseFixed | 0xC0808000, | 886 STLR_x = LoadStoreAcquireReleaseFixed | 0xC0808000, |
887 LDAR_x = LoadStoreAcquireReleaseFixed | 0xC0C08000, | 887 LDAR_x = LoadStoreAcquireReleaseFixed | 0xC0C08000, |
888 }; | 888 }; |
889 | 889 |
| 890 // Load/store exclusive. |
| 891 enum LoadStoreExclusiveOp { |
| 892 LoadStoreExclusiveFixed = 0x08000000, |
| 893 LoadStoreExclusiveFMask = 0x3F808000, |
| 894 LoadStoreExclusiveMask = 0xFFE08000, |
| 895 STXRB = LoadStoreExclusiveFixed, |
| 896 LDXRB = LoadStoreExclusiveFixed | 0x00400000, |
| 897 STXRH = LoadStoreExclusiveFixed | 0x40000000, |
| 898 LDXRH = LoadStoreExclusiveFixed | 0x40400000, |
| 899 STXR_w = LoadStoreExclusiveFixed | 0x80000000, |
| 900 LDXR_w = LoadStoreExclusiveFixed | 0x80400000, |
| 901 STXR_x = LoadStoreExclusiveFixed | 0xC0000000, |
| 902 LDXR_x = LoadStoreExclusiveFixed | 0xC0400000, |
| 903 }; |
| 904 |
890 // Conditional compare. | 905 // Conditional compare. |
891 enum ConditionalCompareOp { | 906 enum ConditionalCompareOp { |
892 ConditionalCompareMask = 0x60000000, | 907 ConditionalCompareMask = 0x60000000, |
893 CCMN = 0x20000000, | 908 CCMN = 0x20000000, |
894 CCMP = 0x60000000 | 909 CCMP = 0x60000000 |
895 }; | 910 }; |
896 | 911 |
897 // Conditional compare register. | 912 // Conditional compare register. |
898 enum ConditionalCompareRegisterOp { | 913 enum ConditionalCompareRegisterOp { |
899 ConditionalCompareRegisterFixed = 0x1A400000, | 914 ConditionalCompareRegisterFixed = 0x1A400000, |
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1257 | 1272 |
1258 enum UnallocatedOp { | 1273 enum UnallocatedOp { |
1259 UnallocatedFixed = 0x00000000, | 1274 UnallocatedFixed = 0x00000000, |
1260 UnallocatedFMask = 0x00000000 | 1275 UnallocatedFMask = 0x00000000 |
1261 }; | 1276 }; |
1262 | 1277 |
1263 } // namespace internal | 1278 } // namespace internal |
1264 } // namespace v8 | 1279 } // namespace v8 |
1265 | 1280 |
1266 #endif // V8_ARM64_CONSTANTS_ARM64_H_ | 1281 #endif // V8_ARM64_CONSTANTS_ARM64_H_ |
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