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Side by Side Diff: src/arm64/code-stubs-arm64.cc

Issue 275433004: Require SSE2 support for the ia32 port. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: addressed comments. Created 6 years, 7 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "v8.h" 5 #include "v8.h"
6 6
7 #if V8_TARGET_ARCH_ARM64 7 #if V8_TARGET_ARCH_ARM64
8 8
9 #include "bootstrapper.h" 9 #include "bootstrapper.h"
10 #include "code-stubs.h" 10 #include "code-stubs.h"
(...skipping 4374 matching lines...) Expand 10 before | Expand all | Expand 10 after
4385 kExpectedAllocationSite); 4385 kExpectedAllocationSite);
4386 } 4386 }
4387 4387
4388 // Tail call into the stub that handles binary operations with allocation 4388 // Tail call into the stub that handles binary operations with allocation
4389 // sites. 4389 // sites.
4390 BinaryOpWithAllocationSiteStub stub(isolate(), state_); 4390 BinaryOpWithAllocationSiteStub stub(isolate(), state_);
4391 __ TailCallStub(&stub); 4391 __ TailCallStub(&stub);
4392 } 4392 }
4393 4393
4394 4394
4395 bool CodeStub::CanUseFPRegisters() {
4396 // FP registers always available on ARM64.
4397 return true;
4398 }
4399
4400
4401 void RecordWriteStub::GenerateIncremental(MacroAssembler* masm, Mode mode) { 4395 void RecordWriteStub::GenerateIncremental(MacroAssembler* masm, Mode mode) {
4402 // We need some extra registers for this stub, they have been allocated 4396 // We need some extra registers for this stub, they have been allocated
4403 // but we need to save them before using them. 4397 // but we need to save them before using them.
4404 regs_.Save(masm); 4398 regs_.Save(masm);
4405 4399
4406 if (remembered_set_action_ == EMIT_REMEMBERED_SET) { 4400 if (remembered_set_action_ == EMIT_REMEMBERED_SET) {
4407 Label dont_need_remembered_set; 4401 Label dont_need_remembered_set;
4408 4402
4409 Register value = regs_.scratch0(); 4403 Register value = regs_.scratch0();
4410 __ Ldr(value, MemOperand(regs_.address())); 4404 __ Ldr(value, MemOperand(regs_.address()));
(...skipping 1064 matching lines...) Expand 10 before | Expand all | Expand 10 after
5475 MemOperand(fp, 6 * kPointerSize), 5469 MemOperand(fp, 6 * kPointerSize),
5476 NULL); 5470 NULL);
5477 } 5471 }
5478 5472
5479 5473
5480 #undef __ 5474 #undef __
5481 5475
5482 } } // namespace v8::internal 5476 } } // namespace v8::internal
5483 5477
5484 #endif // V8_TARGET_ARCH_ARM64 5478 #endif // V8_TARGET_ARCH_ARM64
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