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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "v8.h" | 5 #include "v8.h" |
6 | 6 |
7 #if V8_TARGET_ARCH_IA32 | 7 #if V8_TARGET_ARCH_IA32 |
8 | 8 |
9 #include "ia32/lithium-gap-resolver-ia32.h" | 9 #include "ia32/lithium-gap-resolver-ia32.h" |
10 #include "ia32/lithium-codegen-ia32.h" | 10 #include "ia32/lithium-codegen-ia32.h" |
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288 if (cgen_->IsInteger32(constant_source)) { | 288 if (cgen_->IsInteger32(constant_source)) { |
289 __ Move(dst, cgen_->ToImmediate(constant_source, r)); | 289 __ Move(dst, cgen_->ToImmediate(constant_source, r)); |
290 } else { | 290 } else { |
291 __ LoadObject(dst, cgen_->ToHandle(constant_source)); | 291 __ LoadObject(dst, cgen_->ToHandle(constant_source)); |
292 } | 292 } |
293 } else if (destination->IsDoubleRegister()) { | 293 } else if (destination->IsDoubleRegister()) { |
294 double v = cgen_->ToDouble(constant_source); | 294 double v = cgen_->ToDouble(constant_source); |
295 uint64_t int_val = BitCast<uint64_t, double>(v); | 295 uint64_t int_val = BitCast<uint64_t, double>(v); |
296 int32_t lower = static_cast<int32_t>(int_val); | 296 int32_t lower = static_cast<int32_t>(int_val); |
297 int32_t upper = static_cast<int32_t>(int_val >> kBitsPerInt); | 297 int32_t upper = static_cast<int32_t>(int_val >> kBitsPerInt); |
298 if (CpuFeatures::IsSupported(SSE2)) { | 298 XMMRegister dst = cgen_->ToDoubleRegister(destination); |
299 CpuFeatureScope scope(cgen_->masm(), SSE2); | 299 if (int_val == 0) { |
300 XMMRegister dst = cgen_->ToDoubleRegister(destination); | 300 __ xorps(dst, dst); |
301 if (int_val == 0) { | |
302 __ xorps(dst, dst); | |
303 } else { | |
304 __ push(Immediate(upper)); | |
305 __ push(Immediate(lower)); | |
306 __ movsd(dst, Operand(esp, 0)); | |
307 __ add(esp, Immediate(kDoubleSize)); | |
308 } | |
309 } else { | 301 } else { |
310 __ push(Immediate(upper)); | 302 __ push(Immediate(upper)); |
311 __ push(Immediate(lower)); | 303 __ push(Immediate(lower)); |
312 X87Register dst = cgen_->ToX87Register(destination); | 304 __ movsd(dst, Operand(esp, 0)); |
313 cgen_->X87Mov(dst, MemOperand(esp, 0)); | |
314 __ add(esp, Immediate(kDoubleSize)); | 305 __ add(esp, Immediate(kDoubleSize)); |
315 } | 306 } |
316 } else { | 307 } else { |
317 ASSERT(destination->IsStackSlot()); | 308 ASSERT(destination->IsStackSlot()); |
318 Operand dst = cgen_->ToOperand(destination); | 309 Operand dst = cgen_->ToOperand(destination); |
319 Representation r = cgen_->IsSmi(constant_source) | 310 Representation r = cgen_->IsSmi(constant_source) |
320 ? Representation::Smi() : Representation::Integer32(); | 311 ? Representation::Smi() : Representation::Integer32(); |
321 if (cgen_->IsInteger32(constant_source)) { | 312 if (cgen_->IsInteger32(constant_source)) { |
322 __ Move(dst, cgen_->ToImmediate(constant_source, r)); | 313 __ Move(dst, cgen_->ToImmediate(constant_source, r)); |
323 } else { | 314 } else { |
324 Register tmp = EnsureTempRegister(); | 315 Register tmp = EnsureTempRegister(); |
325 __ LoadObject(tmp, cgen_->ToHandle(constant_source)); | 316 __ LoadObject(tmp, cgen_->ToHandle(constant_source)); |
326 __ mov(dst, tmp); | 317 __ mov(dst, tmp); |
327 } | 318 } |
328 } | 319 } |
329 | 320 |
330 } else if (source->IsDoubleRegister()) { | 321 } else if (source->IsDoubleRegister()) { |
331 if (CpuFeatures::IsSupported(SSE2)) { | 322 XMMRegister src = cgen_->ToDoubleRegister(source); |
332 CpuFeatureScope scope(cgen_->masm(), SSE2); | 323 if (destination->IsDoubleRegister()) { |
333 XMMRegister src = cgen_->ToDoubleRegister(source); | 324 XMMRegister dst = cgen_->ToDoubleRegister(destination); |
334 if (destination->IsDoubleRegister()) { | 325 __ movaps(dst, src); |
335 XMMRegister dst = cgen_->ToDoubleRegister(destination); | |
336 __ movaps(dst, src); | |
337 } else { | |
338 ASSERT(destination->IsDoubleStackSlot()); | |
339 Operand dst = cgen_->ToOperand(destination); | |
340 __ movsd(dst, src); | |
341 } | |
342 } else { | 326 } else { |
343 // load from the register onto the stack, store in destination, which must | |
344 // be a double stack slot in the non-SSE2 case. | |
345 ASSERT(destination->IsDoubleStackSlot()); | 327 ASSERT(destination->IsDoubleStackSlot()); |
346 Operand dst = cgen_->ToOperand(destination); | 328 Operand dst = cgen_->ToOperand(destination); |
347 X87Register src = cgen_->ToX87Register(source); | 329 __ movsd(dst, src); |
348 cgen_->X87Mov(dst, src); | |
349 } | 330 } |
350 } else if (source->IsDoubleStackSlot()) { | 331 } else if (source->IsDoubleStackSlot()) { |
351 if (CpuFeatures::IsSupported(SSE2)) { | 332 ASSERT(destination->IsDoubleRegister() || |
352 CpuFeatureScope scope(cgen_->masm(), SSE2); | 333 destination->IsDoubleStackSlot()); |
353 ASSERT(destination->IsDoubleRegister() || | 334 Operand src = cgen_->ToOperand(source); |
354 destination->IsDoubleStackSlot()); | 335 if (destination->IsDoubleRegister()) { |
355 Operand src = cgen_->ToOperand(source); | 336 XMMRegister dst = cgen_->ToDoubleRegister(destination); |
356 if (destination->IsDoubleRegister()) { | 337 __ movsd(dst, src); |
357 XMMRegister dst = cgen_->ToDoubleRegister(destination); | |
358 __ movsd(dst, src); | |
359 } else { | |
360 // We rely on having xmm0 available as a fixed scratch register. | |
361 Operand dst = cgen_->ToOperand(destination); | |
362 __ movsd(xmm0, src); | |
363 __ movsd(dst, xmm0); | |
364 } | |
365 } else { | 338 } else { |
366 // load from the stack slot on top of the floating point stack, and then | 339 // We rely on having xmm0 available as a fixed scratch register. |
367 // store in destination. If destination is a double register, then it | 340 Operand dst = cgen_->ToOperand(destination); |
368 // represents the top of the stack and nothing needs to be done. | 341 __ movsd(xmm0, src); |
369 if (destination->IsDoubleStackSlot()) { | 342 __ movsd(dst, xmm0); |
370 Register tmp = EnsureTempRegister(); | |
371 Operand src0 = cgen_->ToOperand(source); | |
372 Operand src1 = cgen_->HighOperand(source); | |
373 Operand dst0 = cgen_->ToOperand(destination); | |
374 Operand dst1 = cgen_->HighOperand(destination); | |
375 __ mov(tmp, src0); // Then use tmp to copy source to destination. | |
376 __ mov(dst0, tmp); | |
377 __ mov(tmp, src1); | |
378 __ mov(dst1, tmp); | |
379 } else { | |
380 Operand src = cgen_->ToOperand(source); | |
381 X87Register dst = cgen_->ToX87Register(destination); | |
382 cgen_->X87Mov(dst, src); | |
383 } | |
384 } | 343 } |
385 } else { | 344 } else { |
386 UNREACHABLE(); | 345 UNREACHABLE(); |
387 } | 346 } |
388 | 347 |
389 RemoveMove(index); | 348 RemoveMove(index); |
390 } | 349 } |
391 | 350 |
392 | 351 |
393 void LGapResolver::EmitSwap(int index) { | 352 void LGapResolver::EmitSwap(int index) { |
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438 __ xor_(src, tmp0); | 397 __ xor_(src, tmp0); |
439 __ xor_(tmp0, src); | 398 __ xor_(tmp0, src); |
440 __ mov(dst, tmp0); | 399 __ mov(dst, tmp0); |
441 } else { | 400 } else { |
442 __ mov(tmp0, dst); | 401 __ mov(tmp0, dst); |
443 __ mov(tmp1, src); | 402 __ mov(tmp1, src); |
444 __ mov(dst, tmp1); | 403 __ mov(dst, tmp1); |
445 __ mov(src, tmp0); | 404 __ mov(src, tmp0); |
446 } | 405 } |
447 } else if (source->IsDoubleRegister() && destination->IsDoubleRegister()) { | 406 } else if (source->IsDoubleRegister() && destination->IsDoubleRegister()) { |
448 CpuFeatureScope scope(cgen_->masm(), SSE2); | |
449 // XMM register-register swap. We rely on having xmm0 | 407 // XMM register-register swap. We rely on having xmm0 |
450 // available as a fixed scratch register. | 408 // available as a fixed scratch register. |
451 XMMRegister src = cgen_->ToDoubleRegister(source); | 409 XMMRegister src = cgen_->ToDoubleRegister(source); |
452 XMMRegister dst = cgen_->ToDoubleRegister(destination); | 410 XMMRegister dst = cgen_->ToDoubleRegister(destination); |
453 __ movaps(xmm0, src); | 411 __ movaps(xmm0, src); |
454 __ movaps(src, dst); | 412 __ movaps(src, dst); |
455 __ movaps(dst, xmm0); | 413 __ movaps(dst, xmm0); |
456 } else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) { | 414 } else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) { |
457 CpuFeatureScope scope(cgen_->masm(), SSE2); | |
458 // XMM register-memory swap. We rely on having xmm0 | 415 // XMM register-memory swap. We rely on having xmm0 |
459 // available as a fixed scratch register. | 416 // available as a fixed scratch register. |
460 ASSERT(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot()); | 417 ASSERT(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot()); |
461 XMMRegister reg = cgen_->ToDoubleRegister(source->IsDoubleRegister() | 418 XMMRegister reg = cgen_->ToDoubleRegister(source->IsDoubleRegister() |
462 ? source | 419 ? source |
463 : destination); | 420 : destination); |
464 Operand other = | 421 Operand other = |
465 cgen_->ToOperand(source->IsDoubleRegister() ? destination : source); | 422 cgen_->ToOperand(source->IsDoubleRegister() ? destination : source); |
466 __ movsd(xmm0, other); | 423 __ movsd(xmm0, other); |
467 __ movsd(other, reg); | 424 __ movsd(other, reg); |
468 __ movaps(reg, xmm0); | 425 __ movaps(reg, xmm0); |
469 } else if (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot()) { | 426 } else if (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot()) { |
470 CpuFeatureScope scope(cgen_->masm(), SSE2); | |
471 // Double-width memory-to-memory. Spill on demand to use a general | 427 // Double-width memory-to-memory. Spill on demand to use a general |
472 // purpose temporary register and also rely on having xmm0 available as | 428 // purpose temporary register and also rely on having xmm0 available as |
473 // a fixed scratch register. | 429 // a fixed scratch register. |
474 Register tmp = EnsureTempRegister(); | 430 Register tmp = EnsureTempRegister(); |
475 Operand src0 = cgen_->ToOperand(source); | 431 Operand src0 = cgen_->ToOperand(source); |
476 Operand src1 = cgen_->HighOperand(source); | 432 Operand src1 = cgen_->HighOperand(source); |
477 Operand dst0 = cgen_->ToOperand(destination); | 433 Operand dst0 = cgen_->ToOperand(destination); |
478 Operand dst1 = cgen_->HighOperand(destination); | 434 Operand dst1 = cgen_->HighOperand(destination); |
479 __ movsd(xmm0, dst0); // Save destination in xmm0. | 435 __ movsd(xmm0, dst0); // Save destination in xmm0. |
480 __ mov(tmp, src0); // Then use tmp to copy source to destination. | 436 __ mov(tmp, src0); // Then use tmp to copy source to destination. |
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517 } else if (destination->IsRegister()) { | 473 } else if (destination->IsRegister()) { |
518 source_uses_[destination->index()] = CountSourceUses(destination); | 474 source_uses_[destination->index()] = CountSourceUses(destination); |
519 } | 475 } |
520 } | 476 } |
521 | 477 |
522 #undef __ | 478 #undef __ |
523 | 479 |
524 } } // namespace v8::internal | 480 } } // namespace v8::internal |
525 | 481 |
526 #endif // V8_TARGET_ARCH_IA32 | 482 #endif // V8_TARGET_ARCH_IA32 |
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