Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(40)

Issues Search
    My Issues | Starred     Open | Closed | All

Side by Side Diff: src/ppc/constants-ppc.h

Issue 2754263004: PPC: [Atomics] Make Atomics.exchange a builtin using TF (Closed)
Patch Set: rebased Created 3 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/ppc/assembler-ppc.cc ('k') | src/ppc/disasm-ppc.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_PPC_CONSTANTS_PPC_H_ 5 #ifndef V8_PPC_CONSTANTS_PPC_H_
6 #define V8_PPC_CONSTANTS_PPC_H_ 6 #define V8_PPC_CONSTANTS_PPC_H_
7 7
8 #include <stdint.h> 8 #include <stdint.h>
9 9
10 #include "src/base/logging.h" 10 #include "src/base/logging.h"
(...skipping 1059 matching lines...) Expand 10 before | Expand all | Expand 10 after
1070 V(vcmpgtsw, VCMPGTSW, 0x10000386) \ 1070 V(vcmpgtsw, VCMPGTSW, 0x10000386) \
1071 /* Vector Compare Greater Than Unsigned Byte */ \ 1071 /* Vector Compare Greater Than Unsigned Byte */ \
1072 V(vcmpgtub, VCMPGTUB, 0x10000206) \ 1072 V(vcmpgtub, VCMPGTUB, 0x10000206) \
1073 /* Vector Compare Greater Than Unsigned Doubleword */ \ 1073 /* Vector Compare Greater Than Unsigned Doubleword */ \
1074 V(vcmpgtud, VCMPGTUD, 0x100002C7) \ 1074 V(vcmpgtud, VCMPGTUD, 0x100002C7) \
1075 /* Vector Compare Greater Than Unsigned Halfword */ \ 1075 /* Vector Compare Greater Than Unsigned Halfword */ \
1076 V(vcmpgtuh, VCMPGTUH, 0x10000246) \ 1076 V(vcmpgtuh, VCMPGTUH, 0x10000246) \
1077 /* Vector Compare Greater Than Unsigned Word */ \ 1077 /* Vector Compare Greater Than Unsigned Word */ \
1078 V(vcmpgtuw, VCMPGTUW, 0x10000286) 1078 V(vcmpgtuw, VCMPGTUW, 0x10000286)
1079 1079
1080 #define PPC_X_OPCODE_A_FORM_LIST(V) \ 1080 #define PPC_X_OPCODE_A_FORM_LIST(V) \
1081 /* Modulo Signed Dword */ \ 1081 /* Modulo Signed Dword */ \
1082 V(modsd, MODSD, 0x7C000612) \ 1082 V(modsd, MODSD, 0x7C000612) \
1083 /* Modulo Unsigned Dword */ \ 1083 /* Modulo Unsigned Dword */ \
1084 V(modud, MODUD, 0x7C000212) \ 1084 V(modud, MODUD, 0x7C000212) \
1085 /* Modulo Signed Word */ \ 1085 /* Modulo Signed Word */ \
1086 V(modsw, MODSW, 0x7C000616) \ 1086 V(modsw, MODSW, 0x7C000616) \
1087 /* Modulo Unsigned Word */ \ 1087 /* Modulo Unsigned Word */ \
1088 V(moduw, MODUW, 0x7C000216) \ 1088 V(moduw, MODUW, 0x7C000216)
1089 1089
1090 #define PPC_X_OPCODE_B_FORM_LIST(V) \ 1090 #define PPC_X_OPCODE_B_FORM_LIST(V) \
1091 /* XOR */ \ 1091 /* XOR */ \
1092 V(xor_, XORX, 0x7C000278) \ 1092 V(xor_, XORX, 0x7C000278) \
1093 /* AND */ \ 1093 /* AND */ \
1094 V(and_, ANDX, 0x7C000038) \ 1094 V(and_, ANDX, 0x7C000038) \
1095 /* AND with Complement */ \ 1095 /* AND with Complement */ \
1096 V(andc, ANDCX, 0x7C000078) \ 1096 V(andc, ANDCX, 0x7C000078) \
1097 /* OR */ \ 1097 /* OR */ \
1098 V(orx, ORX, 0x7C000378) \ 1098 V(orx, ORX, 0x7C000378) \
1099 /* OR with Complement */ \ 1099 /* OR with Complement */ \
1100 V(orc, ORC, 0x7C000338) \ 1100 V(orc, ORC, 0x7C000338) \
1101 /* NOR */ \ 1101 /* NOR */ \
1102 V(nor, NORX, 0x7C0000F8) \ 1102 V(nor, NORX, 0x7C0000F8) \
1103 /* Shift Right Word */ \ 1103 /* Shift Right Word */ \
1104 V(srw, SRWX, 0x7C000430) \ 1104 V(srw, SRWX, 0x7C000430) \
1105 /* Shift Left Word */ \ 1105 /* Shift Left Word */ \
1106 V(slw, SLWX, 0x7C000030) \ 1106 V(slw, SLWX, 0x7C000030) \
1107 /* Shift Right Algebraic Word */ \ 1107 /* Shift Right Algebraic Word */ \
1108 V(sraw, SRAW, 0x7C000630) \ 1108 V(sraw, SRAW, 0x7C000630) \
1109 /* Shift Left Doubleword */ \ 1109 /* Shift Left Doubleword */ \
1110 V(sld, SLDX, 0x7C000036) \ 1110 V(sld, SLDX, 0x7C000036) \
1111 /* Shift Right Algebraic Doubleword */ \ 1111 /* Shift Right Algebraic Doubleword */ \
1112 V(srad, SRAD, 0x7C000634) \ 1112 V(srad, SRAD, 0x7C000634) \
1113 /* Shift Right Doubleword */ \ 1113 /* Shift Right Doubleword */ \
1114 V(srd, SRDX, 0x7C000436) \ 1114 V(srd, SRDX, 0x7C000436)
1115 1115
1116 #define PPC_X_OPCODE_C_FORM_LIST(V) \ 1116 #define PPC_X_OPCODE_C_FORM_LIST(V) \
1117 /* Count Leading Zeros Word */ \ 1117 /* Count Leading Zeros Word */ \
1118 V(cntlzw, CNTLZWX, 0x7C000034) \ 1118 V(cntlzw, CNTLZWX, 0x7C000034) \
1119 /* Count Leading Zeros Doubleword */ \ 1119 /* Count Leading Zeros Doubleword */ \
1120 V(cntlzd, CNTLZDX, 0x7C000074) \ 1120 V(cntlzd, CNTLZDX, 0x7C000074) \
1121 /* Population Count Byte-wise */ \ 1121 /* Population Count Byte-wise */ \
1122 V(popcntb, POPCNTB, 0x7C0000F4) \ 1122 V(popcntb, POPCNTB, 0x7C0000F4) \
1123 /* Population Count Words */ \ 1123 /* Population Count Words */ \
1124 V(popcntw, POPCNTW, 0x7C0002F4) \ 1124 V(popcntw, POPCNTW, 0x7C0002F4) \
1125 /* Population Count Doubleword */ \ 1125 /* Population Count Doubleword */ \
1126 V(popcntd, POPCNTD, 0x7C0003F4) \ 1126 V(popcntd, POPCNTD, 0x7C0003F4) \
1127 /* Extend Sign Byte */ \ 1127 /* Extend Sign Byte */ \
1128 V(extsb, EXTSB, 0x7C000774) \ 1128 V(extsb, EXTSB, 0x7C000774) \
1129 /* Extend Sign Halfword */ \ 1129 /* Extend Sign Halfword */ \
1130 V(extsh, EXTSH, 0x7C000734) \ 1130 V(extsh, EXTSH, 0x7C000734)
1131 1131
1132 #define PPC_X_OPCODE_D_FORM_LIST(V) \ 1132 #define PPC_X_OPCODE_D_FORM_LIST(V) \
1133 /* Load Halfword Byte-Reverse Indexed */ \ 1133 /* Load Halfword Byte-Reverse Indexed */ \
1134 V(lhbrx, LHBRX, 0x7C00062C) \ 1134 V(lhbrx, LHBRX, 0x7C00062C) \
1135 /* Load Word Byte-Reverse Indexed */ \ 1135 /* Load Word Byte-Reverse Indexed */ \
1136 V(lwbrx, LWBRX, 0x7C00042C) \ 1136 V(lwbrx, LWBRX, 0x7C00042C) \
1137 /* Load Doubleword Byte-Reverse Indexed */ \ 1137 /* Load Doubleword Byte-Reverse Indexed */ \
1138 V(ldbrx, LDBRX, 0x7C000428) \ 1138 V(ldbrx, LDBRX, 0x7C000428) \
1139 /* Load Byte and Zero Indexed */ \ 1139 /* Load Byte and Zero Indexed */ \
1140 V(lbzx, LBZX, 0x7C0000AE) \ 1140 V(lbzx, LBZX, 0x7C0000AE) \
1141 /* Load Byte and Zero with Update Indexed */ \ 1141 /* Load Byte and Zero with Update Indexed */ \
1142 V(lbzux, LBZUX, 0x7C0000EE) \ 1142 V(lbzux, LBZUX, 0x7C0000EE) \
1143 /* Load Halfword and Zero Indexed */ \ 1143 /* Load Halfword and Zero Indexed */ \
1144 V(lhzx, LHZX, 0x7C00022E) \ 1144 V(lhzx, LHZX, 0x7C00022E) \
1145 /* Load Halfword and Zero with Update Indexed */ \ 1145 /* Load Halfword and Zero with Update Indexed */ \
1146 V(lhzux, LHZUX, 0x7C00026E) \ 1146 V(lhzux, LHZUX, 0x7C00026E) \
1147 /* Load Halfword Algebraic Indexed */ \ 1147 /* Load Halfword Algebraic Indexed */ \
1148 V(lhax, LHAX, 0x7C0002AE) \ 1148 V(lhax, LHAX, 0x7C0002AE) \
1149 /* Load Word and Zero Indexed */ \ 1149 /* Load Word and Zero Indexed */ \
1150 V(lwzx, LWZX, 0x7C00002E) \ 1150 V(lwzx, LWZX, 0x7C00002E) \
1151 /* Load Word and Zero with Update Indexed */ \ 1151 /* Load Word and Zero with Update Indexed */ \
1152 V(lwzux, LWZUX, 0x7C00006E) \ 1152 V(lwzux, LWZUX, 0x7C00006E) \
1153 /* Load Doubleword Indexed */ \ 1153 /* Load Doubleword Indexed */ \
1154 V(ldx, LDX, 0x7C00002A) \ 1154 V(ldx, LDX, 0x7C00002A) \
1155 /* Load Doubleword with Update Indexed */ \ 1155 /* Load Doubleword with Update Indexed */ \
1156 V(ldux, LDUX, 0x7C00006A) \ 1156 V(ldux, LDUX, 0x7C00006A) \
1157 /* Load Floating-Point Double Indexed */ \ 1157 /* Load Floating-Point Double Indexed */ \
1158 V(lfdx, LFDX, 0x7C0004AE) \ 1158 V(lfdx, LFDX, 0x7C0004AE) \
1159 /* Load Floating-Point Single Indexed */ \ 1159 /* Load Floating-Point Single Indexed */ \
1160 V(lfsx, LFSX, 0x7C00042E) \ 1160 V(lfsx, LFSX, 0x7C00042E) \
1161 /* Load Floating-Point Double with Update Indexed */ \ 1161 /* Load Floating-Point Double with Update Indexed */ \
1162 V(lfdux, LFDUX, 0x7C0004EE) \ 1162 V(lfdux, LFDUX, 0x7C0004EE) \
1163 /* Load Floating-Point Single with Update Indexed */ \ 1163 /* Load Floating-Point Single with Update Indexed */ \
1164 V(lfsux, LFSUX, 0x7C00046E) \ 1164 V(lfsux, LFSUX, 0x7C00046E) \
1165 /* Store Byte with Update Indexed */ \ 1165 /* Store Byte with Update Indexed */ \
1166 V(stbux, STBUX, 0x7C0001EE) \ 1166 V(stbux, STBUX, 0x7C0001EE) \
1167 /* Store Byte Indexed */ \ 1167 /* Store Byte Indexed */ \
1168 V(stbx, STBX, 0x7C0001AE) \ 1168 V(stbx, STBX, 0x7C0001AE) \
1169 /* Store Halfword with Update Indexed */ \ 1169 /* Store Halfword with Update Indexed */ \
1170 V(sthux, STHUX, 0x7C00036E) \ 1170 V(sthux, STHUX, 0x7C00036E) \
1171 /* Store Halfword Indexed */ \ 1171 /* Store Halfword Indexed */ \
1172 V(sthx, STHX, 0x7C00032E) \ 1172 V(sthx, STHX, 0x7C00032E) \
1173 /* Store Word with Update Indexed */ \ 1173 /* Store Word with Update Indexed */ \
1174 V(stwux, STWUX, 0x7C00016E) \ 1174 V(stwux, STWUX, 0x7C00016E) \
1175 /* Store Word Indexed */ \ 1175 /* Store Word Indexed */ \
1176 V(stwx, STWX, 0x7C00012E) \ 1176 V(stwx, STWX, 0x7C00012E) \
1177 /* Store Doubleword with Update Indexed */ \ 1177 /* Store Doubleword with Update Indexed */ \
1178 V(stdux, STDUX, 0x7C00016A) \ 1178 V(stdux, STDUX, 0x7C00016A) \
1179 /* Store Doubleword Indexed */ \ 1179 /* Store Doubleword Indexed */ \
1180 V(stdx, STDX, 0x7C00012A) \ 1180 V(stdx, STDX, 0x7C00012A) \
1181 /* Store Floating-Point Double with Update Indexed */ \ 1181 /* Store Floating-Point Double with Update Indexed */ \
1182 V(stfdux, STFDUX, 0x7C0005EE) \ 1182 V(stfdux, STFDUX, 0x7C0005EE) \
1183 /* Store Floating-Point Double Indexed */ \ 1183 /* Store Floating-Point Double Indexed */ \
1184 V(stfdx, STFDX, 0x7C0005AE) \ 1184 V(stfdx, STFDX, 0x7C0005AE) \
1185 /* Store Floating-Point Single with Update Indexed */ \ 1185 /* Store Floating-Point Single with Update Indexed */ \
1186 V(stfsux, STFSUX, 0x7C00056E) \ 1186 V(stfsux, STFSUX, 0x7C00056E) \
1187 /* Store Floating-Point Single Indexed */ \ 1187 /* Store Floating-Point Single Indexed */ \
1188 V(stfsx, STFSX, 0x7C00052E) \ 1188 V(stfsx, STFSX, 0x7C00052E)
1189 1189
1190 #define PPC_X_OPCODE_E_FORM_LIST(V) \ 1190 #define PPC_X_OPCODE_E_FORM_LIST(V) \
1191 /* Shift Right Algebraic Word Immediate */ \ 1191 /* Shift Right Algebraic Word Immediate */ \
1192 V(srawi, SRAWIX, 0x7C000670) \ 1192 V(srawi, SRAWIX, 0x7C000670)
1193 1193
1194 #define PPC_X_OPCODE_F_FORM_LIST(V) \ 1194 #define PPC_X_OPCODE_F_FORM_LIST(V) \
1195 /* Compare */ \ 1195 /* Compare */ \
1196 V(cmp, CMP, 0x7C000000) \ 1196 V(cmp, CMP, 0x7C000000) \
1197 /* Compare Logical */ \ 1197 /* Compare Logical */ \
1198 V(cmpl, CMPL, 0x7C000040) \ 1198 V(cmpl, CMPL, 0x7C000040)
1199
1200 #define PPC_X_OPCODE_EH_S_FORM_LIST(V) \
1201 /* Store Byte Conditional Indexed */ \
1202 V(stbcx, STBCX, 0x7C00056D) \
1203 /* Store Halfword Conditional Indexed Xform */ \
1204 V(sthcx, STHCX, 0x7C0005AD) \
1205 /* Store Word Conditional Indexed & record CR0 */ \
1206 V(stwcx, STWCX, 0x7C00012D)
1207
1208 #define PPC_X_OPCODE_EH_L_FORM_LIST(V) \
1209 /* Load Byte And Reserve Indexed */ \
1210 V(lbarx, LBARX, 0x7C000068) \
1211 /* Load Halfword And Reserve Indexed Xform */ \
1212 V(lharx, LHARX, 0x7C0000E8) \
1213 /* Load Word and Reserve Indexed */ \
1214 V(lwarx, LWARX, 0x7C000028)
1199 1215
1200 #define PPC_X_OPCODE_UNUSED_LIST(V) \ 1216 #define PPC_X_OPCODE_UNUSED_LIST(V) \
1201 /* Bit Permute Doubleword */ \ 1217 /* Bit Permute Doubleword */ \
1202 V(bpermd, BPERMD, 0x7C0001F8) \ 1218 V(bpermd, BPERMD, 0x7C0001F8) \
1203 /* Extend Sign Word */ \ 1219 /* Extend Sign Word */ \
1204 V(extsw, EXTSW, 0x7C0007B4) \ 1220 V(extsw, EXTSW, 0x7C0007B4) \
1205 /* Load Doubleword And Reserve Indexed */ \ 1221 /* Load Doubleword And Reserve Indexed */ \
1206 V(ldarx, LDARX, 0x7C0000A8) \ 1222 V(ldarx, LDARX, 0x7C0000A8) \
1207 /* Load Word Algebraic with Update Indexed */ \ 1223 /* Load Word Algebraic with Update Indexed */ \
1208 V(lwaux, LWAUX, 0x7C0002EA) \ 1224 V(lwaux, LWAUX, 0x7C0002EA) \
(...skipping 18 matching lines...) Expand all
1227 /* Data Cache Block Touch */ \ 1243 /* Data Cache Block Touch */ \
1228 V(dcbt, DCBT, 0x7C00022C) \ 1244 V(dcbt, DCBT, 0x7C00022C) \
1229 /* Data Cache Block Touch for Store */ \ 1245 /* Data Cache Block Touch for Store */ \
1230 V(dcbtst, DCBTST, 0x7C0001EC) \ 1246 V(dcbtst, DCBTST, 0x7C0001EC) \
1231 /* Data Cache Block Zero */ \ 1247 /* Data Cache Block Zero */ \
1232 V(dcbz, DCBZ, 0x7C0007EC) \ 1248 V(dcbz, DCBZ, 0x7C0007EC) \
1233 /* Equivalent */ \ 1249 /* Equivalent */ \
1234 V(eqv, EQV, 0x7C000238) \ 1250 V(eqv, EQV, 0x7C000238) \
1235 /* Instruction Cache Block Invalidate */ \ 1251 /* Instruction Cache Block Invalidate */ \
1236 V(icbi, ICBI, 0x7C0007AC) \ 1252 V(icbi, ICBI, 0x7C0007AC) \
1237 /* Load Byte And Reserve Indexed */ \
1238 V(lbarx, LBARX, 0x7C000068) \
1239 /* Load Halfword And Reserve Indexed Xform */ \
1240 V(lharx, LHARX, 0x7C0000E8) \
1241 /* Load Halfword Algebraic with Update Indexed */ \
1242 V(lhaux, LHAUX, 0x7C0002EE) \
1243 /* Load Word and Reserve Indexed */ \
1244 V(lwarx, LWARX, 0x7C000028) \
1245 /* NAND */ \ 1253 /* NAND */ \
1246 V(nand, NAND, 0x7C0003B8) \ 1254 V(nand, NAND, 0x7C0003B8) \
1247 /* Parity Word */ \ 1255 /* Parity Word */ \
1248 V(prtyw, PRTYW, 0x7C000134) \ 1256 V(prtyw, PRTYW, 0x7C000134) \
1249 /* Store Byte Conditional Indexed */ \
1250 V(stbcx, STBCX, 0x7C00056D) \
1251 /* Store Halfword Byte-Reverse Indexed */ \ 1257 /* Store Halfword Byte-Reverse Indexed */ \
1252 V(sthbrx, STHBRX, 0x7C00072C) \ 1258 V(sthbrx, STHBRX, 0x7C00072C) \
1253 /* Store Halfword Conditional Indexed Xform */ \
1254 V(sthcx, STHCX, 0x7C0005AD) \
1255 /* Store Word Byte-Reverse Indexed */ \ 1259 /* Store Word Byte-Reverse Indexed */ \
1256 V(stwbrx, STWBRX, 0x7C00052C) \ 1260 V(stwbrx, STWBRX, 0x7C00052C) \
1257 /* Store Word Conditional Indexed & record CR0 */ \
1258 V(stwcx, STWCX, 0x7C00012D) \
1259 /* Synchronize */ \ 1261 /* Synchronize */ \
1260 V(sync, SYNC, 0x7C0004AC) \ 1262 V(sync, SYNC, 0x7C0004AC) \
1261 /* Trap Word */ \ 1263 /* Trap Word */ \
1262 V(tw, TW, 0x7C000008) \ 1264 V(tw, TW, 0x7C000008) \
1263 /* ExecuExecuted No Operation */ \ 1265 /* ExecuExecuted No Operation */ \
1264 V(xnop, XNOP, 0x68000000) \ 1266 V(xnop, XNOP, 0x68000000) \
1265 /* Convert Binary Coded Decimal To Declets */ \ 1267 /* Convert Binary Coded Decimal To Declets */ \
1266 V(cbcdtd, CBCDTD, 0x7C000274) \ 1268 V(cbcdtd, CBCDTD, 0x7C000274) \
1267 /* Convert Declets To Binary Coded Decimal */ \ 1269 /* Convert Declets To Binary Coded Decimal */ \
1268 V(cdtbcd, CDTBCD, 0x7C000234) \ 1270 V(cdtbcd, CDTBCD, 0x7C000234) \
(...skipping 394 matching lines...) Expand 10 before | Expand all | Expand 10 after
1663 V(stvxl, STVXL, 0x7C0003CE) \ 1665 V(stvxl, STVXL, 0x7C0003CE) \
1664 /* Vector Minimum Signed Doubleword */ \ 1666 /* Vector Minimum Signed Doubleword */ \
1665 V(vminsd, VMINSD, 0x100003C2) \ 1667 V(vminsd, VMINSD, 0x100003C2) \
1666 /* Floating Merge Even Word */ \ 1668 /* Floating Merge Even Word */ \
1667 V(fmrgew, FMRGEW, 0xFC00078C) \ 1669 V(fmrgew, FMRGEW, 0xFC00078C) \
1668 /* Floating Merge Odd Word */ \ 1670 /* Floating Merge Odd Word */ \
1669 V(fmrgow, FMRGOW, 0xFC00068C) \ 1671 V(fmrgow, FMRGOW, 0xFC00068C) \
1670 /* Wait for Interrupt */ \ 1672 /* Wait for Interrupt */ \
1671 V(wait, WAIT, 0x7C00007C) 1673 V(wait, WAIT, 0x7C00007C)
1672 1674
1673 #define PPC_X_OPCODE_LIST(V) \ 1675 #define PPC_X_OPCODE_LIST(V) \
1674 PPC_X_OPCODE_A_FORM_LIST(V) \ 1676 PPC_X_OPCODE_A_FORM_LIST(V) \
1675 PPC_X_OPCODE_B_FORM_LIST(V) \ 1677 PPC_X_OPCODE_B_FORM_LIST(V) \
1676 PPC_X_OPCODE_C_FORM_LIST(V) \ 1678 PPC_X_OPCODE_C_FORM_LIST(V) \
1677 PPC_X_OPCODE_D_FORM_LIST(V) \ 1679 PPC_X_OPCODE_D_FORM_LIST(V) \
1678 PPC_X_OPCODE_E_FORM_LIST(V) \ 1680 PPC_X_OPCODE_E_FORM_LIST(V) \
1679 PPC_X_OPCODE_F_FORM_LIST(V) \ 1681 PPC_X_OPCODE_F_FORM_LIST(V) \
1682 PPC_X_OPCODE_EH_L_FORM_LIST(V) \
1680 PPC_X_OPCODE_UNUSED_LIST(V) 1683 PPC_X_OPCODE_UNUSED_LIST(V)
1681 1684
1682
1683 #define PPC_EVS_OPCODE_LIST(V) \ 1685 #define PPC_EVS_OPCODE_LIST(V) \
1684 /* Vector Select */ \ 1686 /* Vector Select */ \
1685 V(evsel, EVSEL, 0x10000278) 1687 V(evsel, EVSEL, 0x10000278)
1686 1688
1687 #define PPC_DS_OPCODE_LIST(V) \ 1689 #define PPC_DS_OPCODE_LIST(V) \
1688 /* Load Doubleword */ \ 1690 /* Load Doubleword */ \
1689 V(ld, LD, 0xE8000000) \ 1691 V(ld, LD, 0xE8000000) \
1690 /* Load Doubleword with Update */ \ 1692 /* Load Doubleword with Update */ \
1691 V(ldu, LDU, 0xE8000001) \ 1693 V(ldu, LDU, 0xE8000001) \
1692 /* Load Word Algebraic */ \ 1694 /* Load Word Algebraic */ \
(...skipping 807 matching lines...) Expand 10 before | Expand all | Expand 10 after
2500 V(rldicl, RLDICL, 0x78000000) \ 2502 V(rldicl, RLDICL, 0x78000000) \
2501 /* Rotate Left Doubleword Immediate then Clear Right */ \ 2503 /* Rotate Left Doubleword Immediate then Clear Right */ \
2502 V(rldicr, RLDICR, 0x78000004) \ 2504 V(rldicr, RLDICR, 0x78000004) \
2503 /* Rotate Left Doubleword Immediate then Mask Insert */ \ 2505 /* Rotate Left Doubleword Immediate then Mask Insert */ \
2504 V(rldimi, RLDIMI, 0x7800000C) 2506 V(rldimi, RLDIMI, 0x7800000C)
2505 2507
2506 #define PPC_SC_OPCODE_LIST(V) \ 2508 #define PPC_SC_OPCODE_LIST(V) \
2507 /* System Call */ \ 2509 /* System Call */ \
2508 V(sc, SC, 0x44000002) 2510 V(sc, SC, 0x44000002)
2509 2511
2510 2512 #define PPC_OPCODE_LIST(V) \
2511 #define PPC_OPCODE_LIST(V) \ 2513 PPC_X_OPCODE_LIST(V) \
2512 PPC_X_OPCODE_LIST(V) \ 2514 PPC_X_OPCODE_EH_S_FORM_LIST(V) \
2513 PPC_XO_OPCODE_LIST(V) \ 2515 PPC_XO_OPCODE_LIST(V) \
2514 PPC_DS_OPCODE_LIST(V) \ 2516 PPC_DS_OPCODE_LIST(V) \
2515 PPC_DQ_OPCODE_LIST(V) \ 2517 PPC_DQ_OPCODE_LIST(V) \
2516 PPC_MDS_OPCODE_LIST(V) \ 2518 PPC_MDS_OPCODE_LIST(V) \
2517 PPC_MD_OPCODE_LIST(V) \ 2519 PPC_MD_OPCODE_LIST(V) \
2518 PPC_XS_OPCODE_LIST(V) \ 2520 PPC_XS_OPCODE_LIST(V) \
2519 PPC_D_OPCODE_LIST(V) \ 2521 PPC_D_OPCODE_LIST(V) \
2520 PPC_I_OPCODE_LIST(V) \ 2522 PPC_I_OPCODE_LIST(V) \
2521 PPC_B_OPCODE_LIST(V) \ 2523 PPC_B_OPCODE_LIST(V) \
2522 PPC_XL_OPCODE_LIST(V) \ 2524 PPC_XL_OPCODE_LIST(V) \
2523 PPC_A_OPCODE_LIST(V) \ 2525 PPC_A_OPCODE_LIST(V) \
2524 PPC_XFX_OPCODE_LIST(V) \ 2526 PPC_XFX_OPCODE_LIST(V) \
2525 PPC_M_OPCODE_LIST(V) \ 2527 PPC_M_OPCODE_LIST(V) \
2526 PPC_SC_OPCODE_LIST(V) \ 2528 PPC_SC_OPCODE_LIST(V) \
2527 PPC_Z23_OPCODE_LIST(V) \ 2529 PPC_Z23_OPCODE_LIST(V) \
2528 PPC_Z22_OPCODE_LIST(V) \ 2530 PPC_Z22_OPCODE_LIST(V) \
2529 PPC_EVX_OPCODE_LIST(V) \ 2531 PPC_EVX_OPCODE_LIST(V) \
2530 PPC_XFL_OPCODE_LIST(V) \ 2532 PPC_XFL_OPCODE_LIST(V) \
2531 PPC_EVS_OPCODE_LIST(V) \ 2533 PPC_EVS_OPCODE_LIST(V) \
2532 PPC_VX_OPCODE_LIST(V) \ 2534 PPC_VX_OPCODE_LIST(V) \
2533 PPC_VA_OPCODE_LIST(V) \ 2535 PPC_VA_OPCODE_LIST(V) \
2534 PPC_VC_OPCODE_LIST(V) \ 2536 PPC_VC_OPCODE_LIST(V) \
2535 PPC_XX1_OPCODE_LIST(V) \ 2537 PPC_XX1_OPCODE_LIST(V) \
2536 PPC_XX2_OPCODE_LIST(V) \ 2538 PPC_XX2_OPCODE_LIST(V) \
2537 PPC_XX3_OPCODE_LIST(V) \ 2539 PPC_XX3_OPCODE_LIST(V) \
2538 PPC_XX4_OPCODE_LIST(V) 2540 PPC_XX4_OPCODE_LIST(V)
2539 2541
2540
2541 enum Opcode : uint32_t { 2542 enum Opcode : uint32_t {
2542 #define DECLARE_INSTRUCTION(name, opcode_name, opcode_value) \ 2543 #define DECLARE_INSTRUCTION(name, opcode_name, opcode_value) \
2543 opcode_name = opcode_value, 2544 opcode_name = opcode_value,
2544 PPC_OPCODE_LIST(DECLARE_INSTRUCTION) 2545 PPC_OPCODE_LIST(DECLARE_INSTRUCTION)
2545 #undef DECLARE_INSTRUCTION 2546 #undef DECLARE_INSTRUCTION
2546 EXT1 = 0x4C000000, // Extended code set 1 2547 EXT1 = 0x4C000000, // Extended code set 1
2547 EXT2 = 0x7C000000, // Extended code set 2 2548 EXT2 = 0x7C000000, // Extended code set 2
2548 EXT3 = 0xEC000000, // Extended code set 3 2549 EXT3 = 0xEC000000, // Extended code set 3
2549 EXT4 = 0xFC000000, // Extended code set 4 2550 EXT4 = 0xFC000000, // Extended code set 4
2550 EXT5 = 0x78000000, // Extended code set 5 - 64bit only 2551 EXT5 = 0x78000000, // Extended code set 5 - 64bit only
(...skipping 58 matching lines...) Expand 10 before | Expand all | Expand 10 after
2609 enum OEBit { 2610 enum OEBit {
2610 SetOE = 1 << 10, // Set overflow exception 2611 SetOE = 1 << 10, // Set overflow exception
2611 LeaveOE = 0 << 10 // No overflow exception 2612 LeaveOE = 0 << 10 // No overflow exception
2612 }; 2613 };
2613 2614
2614 // Record bit 2615 // Record bit
2615 enum RCBit { // Bit 0 2616 enum RCBit { // Bit 0
2616 SetRC = 1, // LT,GT,EQ,SO 2617 SetRC = 1, // LT,GT,EQ,SO
2617 LeaveRC = 0 // None 2618 LeaveRC = 0 // None
2618 }; 2619 };
2620 // Exclusive Access hint bit
2621 enum EHBit { // Bit 0
2622 SetEH = 1, // Exclusive Access
2623 LeaveEH = 0 // Atomic Update
2624 };
2619 2625
2620 // Link bit 2626 // Link bit
2621 enum LKBit { // Bit 0 2627 enum LKBit { // Bit 0
2622 SetLK = 1, // Load effective address of next instruction 2628 SetLK = 1, // Load effective address of next instruction
2623 LeaveLK = 0 // No action 2629 LeaveLK = 0 // No action
2624 }; 2630 };
2625 2631
2626 enum BOfield { // Bits 25-21 2632 enum BOfield { // Bits 25-21
2627 DCBNZF = 0 << 21, // Decrement CTR; branch if CTR != 0 and condition false 2633 DCBNZF = 0 << 21, // Decrement CTR; branch if CTR != 0 and condition false
2628 DCBEZF = 2 << 21, // Decrement CTR; branch if CTR == 0 and condition false 2634 DCBEZF = 2 << 21, // Decrement CTR; branch if CTR == 0 and condition false
(...skipping 177 matching lines...) Expand 10 before | Expand all | Expand 10 after
2806 PPC_D_OPCODE_LIST(OPCODE_CASES) 2812 PPC_D_OPCODE_LIST(OPCODE_CASES)
2807 PPC_I_OPCODE_LIST(OPCODE_CASES) 2813 PPC_I_OPCODE_LIST(OPCODE_CASES)
2808 PPC_B_OPCODE_LIST(OPCODE_CASES) 2814 PPC_B_OPCODE_LIST(OPCODE_CASES)
2809 PPC_M_OPCODE_LIST(OPCODE_CASES) 2815 PPC_M_OPCODE_LIST(OPCODE_CASES)
2810 return static_cast<Opcode>(opcode); 2816 return static_cast<Opcode>(opcode);
2811 } 2817 }
2812 2818
2813 opcode = extcode | BitField(10, 0); 2819 opcode = extcode | BitField(10, 0);
2814 switch (opcode) { 2820 switch (opcode) {
2815 PPC_VX_OPCODE_LIST(OPCODE_CASES) 2821 PPC_VX_OPCODE_LIST(OPCODE_CASES)
2816 return static_cast<Opcode>(opcode); 2822 PPC_X_OPCODE_EH_S_FORM_LIST(OPCODE_CASES)
2823 return static_cast<Opcode>(opcode);
2817 } 2824 }
2818 opcode = extcode | BitField(9, 0); 2825 opcode = extcode | BitField(9, 0);
2819 switch (opcode) { 2826 switch (opcode) {
2820 PPC_VC_OPCODE_LIST(OPCODE_CASES) 2827 PPC_VC_OPCODE_LIST(OPCODE_CASES)
2821 return static_cast<Opcode>(opcode); 2828 return static_cast<Opcode>(opcode);
2822 } 2829 }
2823 opcode = extcode | BitField(10, 1) | BitField(20, 20); 2830 opcode = extcode | BitField(10, 1) | BitField(20, 20);
2824 switch (opcode) { 2831 switch (opcode) {
2825 PPC_XFX_OPCODE_LIST(OPCODE_CASES) 2832 PPC_XFX_OPCODE_LIST(OPCODE_CASES)
2826 return static_cast<Opcode>(opcode); 2833 return static_cast<Opcode>(opcode);
(...skipping 112 matching lines...) Expand 10 before | Expand all | Expand 10 after
2939 // Lookup the register number for the name provided. 2946 // Lookup the register number for the name provided.
2940 static int Number(const char* name); 2947 static int Number(const char* name);
2941 2948
2942 private: 2949 private:
2943 static const char* names_[kNumDoubleRegisters]; 2950 static const char* names_[kNumDoubleRegisters];
2944 }; 2951 };
2945 } // namespace internal 2952 } // namespace internal
2946 } // namespace v8 2953 } // namespace v8
2947 2954
2948 #endif // V8_PPC_CONSTANTS_PPC_H_ 2955 #endif // V8_PPC_CONSTANTS_PPC_H_
OLDNEW
« no previous file with comments | « src/ppc/assembler-ppc.cc ('k') | src/ppc/disasm-ppc.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698